AN1154 STMicroelectronics, AN1154 Datasheet - Page 2

• Manufacturer Part Number: AN1154
• Description: 8031-PSD DESIGN TUTORIAL
• Manufacturer: STMicroelectronics

AN1154 - APPLICATION NOTE
The ISP method just described requires MCU participation. The M88 FLASH+PSD also offers another ISP
method, which uses a JTAG interface, and requires no MCU participation. This means that a completely
blank PSD can be soldered into place, and the entire chip can be programmed, in-system, using ST’s
JTAG FlashLink cable and PSDsoft development software. This is a powerful new feature of the M88
FLASH+PSD that allows for easy updates in the field.
Typically, adding a peripheral to the MCU memory space involves adding a lot of circuitry to decode the
address lines, to latch the data lines, and to handle the bus timing. If an M88 FLASH+PSD device is used,
the MCU address, data, and control signals are already routed and processed inside the PSD, and so this
hardware overhead is not required.
Micro
Cells take advantage of this, and allow the designer to build logic peripherals inside the PSD in an
efficient and flexible manner. This tutorial compares a PSD Micro
Cell design with an equivalent
functional design using an Altera EPM7064S CPLD device, thereby emphasizing the efficiency of the PSD
approach.
The M88x3Fxx has 16 output Micro
Cells (OMCs) and 24 input Micro
Cells (IMCs). Each Micro
Cell
occupies a memory location in the MCU address space, and is connected to the data bus. The ability to
load the flip-flops in the OMCs, and to read them back, is useful in such applications as loadable counters,
shift registers, and other system logic. The IMCs can latch external inputs, and be read by the
microcontroller. IMCs are also useful when implementing handshake communication logic with an outside
source.
ST provides complete chip-level Verilog-HDL models of all PSD devices for use with the PSDsilosIII
simulator. These models can be used in conjunction with a user-defined stimulus file to simulate the
functionality of the PSD. PSDsilosIII also comes with a Waveform Editor/Viewer and Watch window (for
stepping through the simulation) that are used in conjunction with the stimulus file. Most of the PSD’s
status and control signals, as well as all the user-defined logic in the CPLD, are available for use with the
Waveform Editor/Viewer and the Watch window. Thus, the user can define MCU-level tasks, such as read
and write, that can be used as external chip-level stimuli to the PSD, and the results of the stimuli can be
viewed using the Waveform Editor/Viewer and Watch window of PSDsilosIII.
A new utility is featured in PSDsoft version 5.X. This utility automatically generates ANSI-C code for the
PSD functions, and can be used with the user’s choice of MCU cross-compilers.
Design Example
The design that has been chosen, by way of an example, in Figure 1, is a piece of hardware with closed-
loop Automatic Gain Control (AGC). This has an analog RF receiver section, which has a Programmable
Gain Amplifier (PGA) to control the signal level that is output though an envelope detection circuit. The
PGA gain must be adjusted in real-time to keep a constant signal level at the envelope detection output.
An Analog-to-Digital Converter (ADC) monitors this output. When the AGC function works properly, a
constant signal level is output from the receiver, which can be used by other analog and digital circuitry
for signal processing.
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