DS2411P Dallas Semiconducotr, DS2411P Datasheet - Page 8

• Manufacturer Part Number: DS2411P
• Description: Silicon Serial Number with VCC Input
• Manufacturer: Dallas Semiconducotr

1-WIRE SIGNALING
The DS2411 requires strict protocols to ensure data integrity. The protocol consists of four types of
signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1, and Read
Data. Except for the presence pulse the bus master initiates all these signals. The DS2411 can
communicate at two different speeds: standard speed and Overdrive speed. If not explicitly set into the
Overdrive mode, the DS2411 will communicate at standard speed. While in Overdrive Mode the fast
timing applies to all waveforms.
To get from idle to active, the voltage on the 1-Wire line needs to fall from V
To get from active to idle, the voltage needs to rise from V
V
The initialization sequence required to begin any communication with the DS2411 is shown in Figure 6.
A Reset Pulse followed by a Presence Pulse indicates the DS2411 is ready to receive data, given the
correct ROM and memory function command. In a mixed population network, the reset low time t
needs to be long enough for the slowest 1-Wire slave device to recognize it as a reset pulse. If the bus
master uses slew-rate control on the falling edge, it must pull down the line for t
for the edge. A t
standard speed. If the DS2411 is in Overdrive Mode and t
remain in Overdrive Mode.
After the bus master has released the line it goes into receive mode (RX). Now, the 1-Wire bus is pulled
to V
V
t
The t
expired, the DS2411 is ready for data communication. In a mixed population network, t
extended to minimum 480µs at standard speed and 48µs at Overdrive speed to accommodate other 1-
Wire devices.
Read/Write Time Slots
Data communication with the DS2411 takes place in time slots that carry a single bit each. Write time
slots transport data from bus master to slave. Read time-slots transfer data from slave to master. The
definitions of the write and read time slots are illustrated in Figure 7.
All communication begins with the master pulling the data line low. As the voltage on the 1-Wire line
falls below the threshold V
data line will be sampled during a write time slot and how long data will be valid during a read time slot.
Master to Slave
For a write-one time slot, the voltage on the data line must have crossed the V
write-one low time t
below the V
communication the voltage on the data line should not exceed V
After the V
the next time slot.
PDL
ILMAX
TH
. To detect a presence pulse, the master must test the logical state of the 1-Wire line at t
PUP
is crossed, the DS2411 waits for t
RSTH
is relevant for the DS2411 when determining a logical level, but not for triggering any events.
via the pullup resistor or, in case of a DS2480B driver, by active circuitry. When the threshold
window must be at least the sum of t
THMAX
THMIN
RSTL
threshold has been crossed, the DS2411 needs a recovery time t
W1LMAX
threshold until the write-zero low time t
duration of 480µs or longer will exit the Overdrive Mode returning the device to
TL
is expired. For a write-zero time slot, the voltage on the data line must stay
, the DS2411 starts its internal timing generator that determines when the
PDH
and then transmits a Presence Pulse by pulling the line low for
PDHMAX
8 of 11
, t
PDLMAX
RSTL
ILMAX
, and t
is no longer than 80µs, the device will
W0LMIN
ILMAX
past the threshold V
RECMIN
during the entire t
is expired. For most reliable
PUP
. Immediately after t
THMAX
below the threshold V
REC
RSTL
before it is ready for
+ t
threshold after the
F
TH
RSTH
MSP
to compensate
. The voltage
W0L
.
should be
window.
RSTH
RSTL
TL
is
.