DS26502 Maxim Integrated Products, DS26502 Datasheet - Page 82

• Manufacturer Part Number: DS26502
• Description: T1/E1/J1/64KCC BITS Element
• Manufacturer: Maxim Integrated Products

T1 Mode
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bits 0 to 5: Gain Control Bits 0–5 (GC0–GC5). The GC0 through GC5 bits control the gain setting for the non-automatic
gain mode. Use the tables below for setting the recommended values. The LB (line build-out) column refers to the value in the
L0–L2 bits in LIC1 (Line Interface Control 1) register.
Bit 6: Automatic Gain Control Enable (AGCE)
Bit 7: Unused, must be set = 0 for proper operation.
L2
0
0
0
0
1
1
1
1
T1, Impedance Match Off
E1, Impedance Match Off
T1, Impedance Match On
E1, Impedance Match On
NETWORK MODE
L1
0 = use Transmit AGC, TLBC bits 0–5 are “don’t care”
1 = do not use Transmit AGC, TLBC bits 0–5 set nominal level
0
0
1
1
0
0
1
1
—
7
0
0
L0
0
1
0
1
0
1
0
1
DSX-1 (0 to 133 feet)/0dB CSU
DSX-1 (133 to 266 feet)
DSX-1 (266 to 399 feet)
DSX-1 (399 to 533 feet)
DSX-1 (533 to 655 feet)
Reserved
Reserved
Reserved
AGCE
TLBC
Transmit Line Build-Out Control
34h
6
0
0
APPLICATION
LB
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
4
5
0
1
GC5
5
0
0
GC5
1
0
0
1
1
1
0
1
0
0
0
0
1
1
0
1
1
1
1
1
0
0
GC4
4
0
0
GC4
0
1
1
0
0
0
1
1
1
1
1
1
0
0
0
1
0
0
0
0
1
1
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N (1)
1:2
1:2
1:2
1:2
1:2
GC3
GC3
0
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
0
0
1
1
1
1
3
0
0
RETURN LOSS
GC2
1
0
0
0
1
1
0
1
1
1
1
0
0
0
1
1
0
0
0
0
0
0
GC2
2
0
0
N.M.
N.M.
N.M.
N.M.
N.M.
DS26502 T1/E1/J1/64KCC BITS Element
GC1
1
1
1
0
1
1
1
1
1
0
0
1
1
0
0
1
0
0
1
0
1
1
GC1
1
0
0
GC0
0
1
0
0
1
1
1
1
0
1
1
0
0
0
0
1
1
1
0
0
0
0
Rt (1)
0
0
0
0
0
GC0
0
0
0