AN1827 Freescale Semiconductor / Motorola, AN1827 Datasheet - Page 16

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AN1827

Manufacturer Part Number
AN1827
Description
Programming and Erasing FLASH Memory on the MC68HC908AS60
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Application Note
Page Program/Margin Read Algorithm
16
In the MC68HC908AS60, programming of the FLASH memory is done
on a page-by-page basis. A page consists of eight bytes, from
addresses $XXX0 to $XXX7 or from $XXX8 to $XXXF. Therefore, the
addresses of the first byte in a page must be $XXX0 or $XXX8.
This FLASH memory requires the smart programming algorithm. The
smart programming algorithm is defined as an iterative program and
margin read sequence. Every page program operation is followed by a
margin read until the data is programmed successfully. The margin read
step of the smart programming algorithm is used to ensure programmed
bits are programmed to sufficient margin for data retention over the
device’s lifetime.
The smart programming algorithm steps are shown here and in the
Figure 7
1. Initialize attempt counter.
2. Set PGM = 1 and set FDIV bits.
3. Read the FLASH block protect register.
4. Write data to the page being programmed (typically 8 bytes).
Freescale Semiconductor, Inc.
For More Information On This Product,
The sequence will be attempted until the count reaches fls
PGM = 1 configures the FLASH memory for a program operation
and enables the latching of the address and data for
programming. The FDIV bits determine the charge pump
frequency. The frequency should be selected within the range
between 1.8 MHz and 2.5 MHz. Refer to
The block protect register must be read before high voltage can be
enabled. If the desired address is in a protected block, the
programming will fail.
This requires separate write operations for each byte and the
addresses of the page must be $XXX0 to $XXX7, or $XXX8 to
$XXXF.
flowchart.
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Charge
Pump.
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AN1827
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