CY25822-2 Cypress Semiconductor, CY25822-2 Datasheet

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CY25822-2

Manufacturer Part Number
CY25822-2
Description
CK-SSC Spread Spectrum Clock Generator
Manufacturer
Cypress Semiconductor
Datasheet
Cypress Semiconductor Corporation
Document #: 38-07531 Rev. **
Features
• 3.3V operation
• 48- and 66-MHz frequency support
• Selectable slew rate control
• 350-pS jitter
• I
• 500- A power-down current
• Spread Spectrum for best electromagnetic interference
• 8-pin SOIC package
Block Diagram
Pin Configuration
(EMI) reduction
Clock Input
2
PWRDWN#
C programmability
SCLOCK
SDATA
Control
Divider
Logic
Freq.
M
C L K O U T
Feedback
Detector
C L K IN
Divider
Phase
CK-SSC Spread Spectrum Clock Generator
G N D
V D D
N
1
2
3
4
3901 North First Street
Charge
* 1 5 0 K
Pump
C Y 2 5 8 2 2 -2
GND
VDD
P u ll-u p
Modulating
Waveform
PLL
8
7
6
5
*P W R D W N #
R E F O U T
S D A T A
S C L O C K
VCO
San Jose
Dividers
Post
,
CA 95134
REFOUT
CLKOUT
Revised March 18, 2003
(SSCG Output)
www.DataSheet4U.com
CY25822-2
408-943-2600

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CY25822-2 Summary of contents

Page 1

... ll-u p • 3901 North First Street www.DataSheet4U.com CY25822-2 REFOUT CLKOUT Post (SSCG Output) VCO Dividers , • San Jose CA 95134 • 408-943-2600 Revised March 18, 2003 ...

Page 2

... Acknowledge from slave 20 Repeat start 21:27 Slave address – 7 bits 28 Read = 1 29 Acknowledge from slave 30:37 Byte count from slave – 8 bits 38 Acknowledge 39:46 Data byte from slave – 8 bits 47 Acknowledge 48:55 Data byte from slave – 8 bits CY25822-2 www.DataSheet4U.com Block Read Protocol Description Page ...

Page 3

... No Pins SS0 Spread Mode 0 Down 1 Down 0 Down 1 Down 0 Down CY25822-2 www.DataSheet4U.com Acknowledge Data bytes from slave/Acknowledge Data byte N from slave – 8 bits Not Acknowledge Stop Byte Read Protocol Description Start Slave address – 7 bits Write = 0 Acknowledge from slave Command Code – 8 bits ...

Page 4

... I C register bit. CY25822 clocks that are stopped in the driven state are driven low. The CLKIN input must be on and within specified operating parameters before PWRDWN# is asserted and it must remain in this state while PWRDWN# is asserted. CY25822-2 www.DataSheet4U.com Spread Amount% 2.0 2.5 3.0 ±0.3 ± ...

Page 5

... Similarly when CLKOUT or REFOUT is enabled the clock must start in a predictable manner without any glitches or abnormal behavior. Document #: 38-07531 Rev. ** Figure 1. Power-down Assertion Figure 2. Power-down Deassertion 2 C register bits are CY25822-2 www.DataSheet4U.com Page ...

Page 6

... DD Conditions Min. Measured @2.4V 9.45 Measured @0.4V 8.50 Measured @2.4V 6.85 Measured @0.4V 5.95 Measured from 0.4V to 2.4V 2.0 REFOUT and CLOCKOUT Measured from 2.4V to 0.4V 2.0 REFOUT and CLOCKOUT Measured from 0.4V to 2.4V 1.33 REFOUT and CLOCKOUT CY25822-2 www.DataSheet4U.com Min. Max. Unit –0.5 4.6 –0.5 4.6 –0 0.5 VDC DD –65 +150 0 70 – 150 2000 – Volts V– ...

Page 7

... REFOUT – CLOCKOUT – Applies to REFOUT at all – times and CLOCKOUT when SSCG is Off From VDD = 2.0 V – 15 Package Type 8-pin SOIC 8-pin SOIC – Tape and Reel CY25822-2 www.DataSheet4U.com Max. Unit Notes 4.0 V/ns Low Buffer Strength 2 Refer Control 1.0 ns High Buffer Strength 2 ...

Page 8

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 8-lead (150-Mil) SOIC – system, provided that the system conforms to the I CY25822-2 www.DataSheet4U.com 51-85066-* Standard Specification ...

Page 9

... Document History Page Document Title: CY25822-2 CK-SSC Spread Spectrum Clock Generator Document Number: 38-07531 Issue Orig. of REV. ECN NO. Date Change ** 124462 03/19/03 Document #: 38-07531 Rev. ** Description of Change RGL New Data Sheet CY25822-2 www.DataSheet4U.com Page ...

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