AN2203 Freescale Semiconductor / Motorola, AN2203 Datasheet - Page 62

• Manufacturer Part Number: AN2203
• Description: MPC7450 RISC Microprocessor Family Software Optimization Guide
• Manufacturer: Freescale Semiconductor / Motorola

MPC7450 Execution Latencies
Table A-4 lists condition register logical instruction latencies.
62
1
2
3
mftb
mtmsr
mtspr (DBATs)
mtspr (IBATs)
mtspr (MSS)
mtspr (other)
mtspr (XER)
mtsr
mtsrin
mttb
rfi
sc
sync
tlbsync
Refetch serialized instructions (if marked with a 0-cycle execution time) do not have an execute
stage, and all refetch serialized instructions have 1 cycle between the time they are completed and
the time the target/sequential instruction enters the fetch1 stage.
Memory subsystem SPRs are implementation specific and are described in the MPC7450 RISC
Microprocessor Family User’s Manual.
Assuming a 5:1 processor to clock ratio.
Mnemonic
Table A-3. System Operation Instruction Execution Latencies (continued)
crand
crandc
creqv
crnand
crnor
cror
crorc
crxor
mcrf
MPC7450 RISC Microprocessor Family Software Optimization Guide
Mnemonic
Table A-4. Condition Register Logical Execution Latencies
Freescale Semiconductor, Inc.
- NA -
NULL
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
Unit
For More Information On This Product,
MPC750
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
Unit
MPC750,MPC7400
Go to: www.freescale.com
Cycles
- NA -
2 {c,r}
2 {c,r}
1 {e}
2 {e}
2 {e}
2 {e}
1 {e}
2 {e}
2 {e}
1 {e}
—
1
3
Cycles
1 {e}
1 {e}
1 {e}
1 {e}
1 {e}
1 {e}
1 {e}
1 {e}
1 {e}
- NA -
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
Unit
LSU
LSU
MPC7400
8+broadcast {y}
8+broadcast {y}
Cycles
- NA -
2 {c,r}
2 {c,r}
1 {e}
2 {e}
2 {e}
2 {e}
1 {e}
2 {e}
3 {e}
1 {e}
Unit
IU2
IU2
IU2
IU2
IU2
IU2
IU2
IU2
IU2
1
MPC7450
Unit
LSU
LSU
IU2
IU2
IU2
IU2
IU2
IU2
IU2
IU2
IU2
IU2
Cycles
—
—
2{e}
2{e}
2{e}
2{e}
2{e}
2{e}
2{e}
2{e}
2{e}
1
1
MPC7450
35
Cycles
2{e,r}
3:5{s}
5{e}
2{e}
2{e}
2{e}
5{e}
2{e}
2{e}
2{e}
5{e}
0{r}
0{r}
3
{e,s}
MOTOROLA
1