AN2283 Freescale Semiconductor / Motorola, AN2283 Datasheet - Page 3

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AN2283

Manufacturer Part Number
AN2283
Description
Scalable Controller Area Network (MSCAN)
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
MOTOROLA
NOTE:
Motorola Scalable Controller Area Network (MSCAN) Interrupts
Steps to enter Sleep Mode:
The CPU must wait for SLPAK = 1 before it can execute its STOP instruction.
This may take time depending on steps 1 or 2.
Steps to exit Sleep Mode:
or
The CMCR0 and CRFLG registers are shown in
WUPIF
1. The first step for entering Sleep Mode is to abort all pending
2. The CPU requests the Sleep Mode by setting the control bit SLPRQ = 1
3. The MSCAN acknowledges entering Sleep Mode by setting the status
4. Next, enable the wakeup interrupt by setting the Wakeup Interrupt
1. When bus activity is detected:
2. When an external interrupt of the host CPU (for example, IRQ,
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Bit 7
Bit 7
0
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transmissions. See
in the CMCR0 register.
bit SLPAK = 1.
Enable (WUPIE) bit = 1 in the MSCAN Receiver Interrupt Enable
Register (CRIER).
a.
b.
c.
keyboard, etc.) occurs, the CPU needs to clear the control bit SLPRQ
(Sleep Request) bit in the CMCR0 register.
Figure 1. MSCAN Module Control Register 0 (CMCR0)
The MSCAN clears the control bit SLPRQ and the status bit SLPAK
in the CMCR0 register.
The CPU wakeup only occurs if WUPIE is set and the I bit of the
CCR register is clear. The Wakeup Interrupt Flag (WUPIF) bit will
be set in the MSCAN Receiver Flag Register (CRFLG), which in
turn triggers the CPU to wakeup from its Stop Mode.
The clock sources will not be stable immediately out of Stop Mode.
Therefore, the first message will probably be missed.
RWRNIF
Figure 2. MSCAN Receiver Flag Register (CRFLG)
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6
0
6
TWRNIF
CSWAI
5
5
Abort Process
RERRIF
SYNCH
4
4
TLNKEN
TERRIF
Overview.
3
3
Figure 1
BOFFIF
SLPAK
2
2
and
SLPRQ
OVRIF
Figure
1
1
Wakeup Interrupt
SFTRES
AN2283/D
2.
Bit 0
Bit 0
RXF
3

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