AN2283 Freescale Semiconductor / Motorola, AN2283 Datasheet - Page 38

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AN2283

Manufacturer Part Number
AN2283
Description
Scalable Controller Area Network (MSCAN)
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
AN2283/D
Separate Routine
Using the Polling
Method
38
Motorola Scalable Controller Area Network (MSCAN) Interrupts
To handle the Bus Off Interrupt source:
Keep in mind not all system requirements allow recovery. Some system
requirements want to remain in the bus off state. Therefore, those other system
requirements will have different flows compared to the example given here.
Alternate system requirements may have other transmit requests. When a
node is in bus off state it does not transmit or receive any messages. It is only
counting the recessive bits and when 128 occurrences of 11 recessive bits are
monitored the node is out of the bus off state and both the TEC and REC are
reset to 0 and go into normal operation. The systems limited operating strategy
(LOS) capabilities are determined by the network architecture and this node’s
(in the Bus Off State) operating requirements.
No interrupts are generated when the MSCAN goes from the transmitter
warning state to the no error/warning state where TEC < 96. As shown in
Figure
Interrupt Routine.
1. Clear the BOFFIF bit in CRFLG by writing a 1 to it. (As mentioned in
2. Clear the Transmitter Error Interrupt Flag (TERRIF) bit in CRFLG by
3. Set the Soft Reset bit (soft reset state) in the Control Register 0
4. Reinitialize the MSCAN module as in the beginning of the application
5. Clear the Soft Reset bit (normal operation) in CMCR0.
6. Any additional interrupt code.
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Figure
this bit.
writing a 1 to it. (As mentioned in
exclusive OR operation. The reason is that this state is entered from the
Transmitter Error Passive State, where TERRIF was set.) These
interrupt flags remain set in a level sensitive manner as long as the
setting condition remains.
(CMCR0). The registers CMCR1, CBTR0, CBTR1, CIDAC,
CIDAR0–CIDAR7, CIDMR0–CIDMR7 can only be written by the CPU
when the MSCAN12 is in Soft Reset State.
code to make sure none of the control registers have been corrupted.
24, the TWRNIE bit of CRIER is disabled in the Transmitter Warning
If BOFFIF = 1, jump out of this interrupt routine
If BOFFIF = 0, this signifies that the node has monitored 128
occurrences of 11 consecutive recessive [1] bits at which point the
node’s REC and TEC are reset to 0 and out of the bus off state. So
continue on to step 2.
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24, CRFLG utilizes the exclusive OR operation.) Then read back
Figure
24, CRFLG utilizes the
MOTOROLA

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