CY2CC1810 Cypress Semiconductor, CY2CC1810 Datasheet - Page 5

• Manufacturer Part Number: CY2CC1810
• Description: 1:10 Clock Fanout Buffer with Output Enable
• Manufacturer: Cypress Semiconductor

Document #: 38-07055 Rev. *A
Parameter Measurement Information
Notes:
10. Waveform 1 is for an output with internal conditions such that the output is LOW, except when disabled by the output control. Waveform 2 is for an output with
11. All input pulses are supplied by generators having the following characteristics: PRR < 10 MHz, Zo = 50
12. The outputs are measured one at a time with one transition per measurement.
13. t
14. t
15. tPLH and tPHL are the same as t
9.
C
internal conditions such that the output is HIGH, except when disabled by the output control.
PLZ
PZL
From Output
L
Under Test
C
Input
Input
Figure 7. Voltage Waveforms–Pulse Duration
includes probe and jig capacitance
L
and t
and t
= 50 pF
Figure 8. Point-to-Point Load Circuit
PHZ
PZH
From Output
Under Test
C
are the same as t
are the same as t
L
= 3 pF
Figure 6. Load Circuit
1.5 V
t
w(50-50)
DIS
EN
500 ohm
500 ohm
PD.
.
.
OUTPUT
t
w(20-80)
INPUT
500 ohm
1.5 V
1.5 V
V
SS
2x VDD
Figure 11. Pulse Skew–tsk
:
2.7 V
2.7 V
Open
V
0 V
0 V
DD
@ 3.3V
tsk
t
PLH
(P)
=
l
t
PHL
[9,11,12]
Table 2.
- t
PLH
Output
Output Control
(low-level enabling)
S1 at 2 x VDD
Input
l
Waveform 1
Waveform 2
t
t
t
PHZ
PLH
PLZ
S1 at GND
Test
t
PHL
(p)
/t
/t
/t
Enable and Disable Times
PHL
PZL
PZH
Figure 10. Voltage Waveforms–
t
Figure 9. Voltage Waveforms–
PLH
Propagation Delay Times
t
t
PZH
PZL
1.5 V
Z
t
Z
R
< 2.5 nS, t
1.5V
1.5V
VOH
VOL
3V
0V
VOH (min)
1.5 V
2xVDD
Open
1.5 V
1.5 V
VSS
1.5V
COMLINK™ SERIES
S1
F
< 2.5 nS.
1.5 V
[10,13,14]
CY2CC1810
[15]
V
V
OL
OH
See Figure 10
t
1.5 V
t
t
See Figure 9
PHL
PLZ
PHZ
- 0.3V
+ 0.3V
(max)
VOL
Page 5 of 8
1.5 V
0 V
V
V
OH
OL
0 V
3 V
V
V
~0 V
3.3 V
OL
OH