CY2DP3110 Cypress Semiconductor, CY2DP3110 Datasheet - Page 5

• Manufacturer Part Number: CY2DP3110
• Description: Differential Clock/Data Fanout Buffer
• Manufacturer: Cypress Semiconductor

Document #: 38-07469 Rev.*G
Timing Definitions
Figure 4. Propagation Delay (T
V E E
V C C
V I H
V I L
V E E
V IH
V C C
V IL
A n o t h e r
O u t p u t
O u t p u t
V D I F
2 0 -8 0 %
C l o c k
C l o c k
C l o c k
I n p u t
tr, tf,
V P P
for both CLKA or CLKB to Output Pair, PECL/ECL to PECL/ECL
V D I F = > =
Figure 2. HSTL Differential Input Waveform Definitions
0 . 4 V m i n
T P L H ,
V P P ra n g e
0 .1 V - 1 .3 V
T P D
Figure 1. PECL/ECL Input Waveform Definitions
PD
V E E = 0 . 0 V
), output pulse skew (|t
Figure 3. ECL/LVPECL Output
V C C = 3 . 3 V
V C M R M in = V E E + 1 .2
PLH
T P H L
-t
V C M R M a x = V C C
V X m a x = 0 . 9 V
V X M i n = 0 . 6 8
PHL
|), and output-to-output skew (t
t S K ( O )
V P P
FastEdge™ Series
V C M R
V O
V X
V O
CY2DP3110
SK(O)
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