CY2SSTV16857 SpectraLinear, CY2SSTV16857 Datasheet - Page 3

• Manufacturer Part Number: CY2SSTV16857
• Description: 14-Bit Regstered Buffer PC2700-/PC3200-Compliant
• Manufacturer: SpectraLinear

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Rev 1.0, November 21, 2006
Absolute Maximum Conditions
This device contains circuitry designed to protect the inputs
against damage due to high static voltages or electric field;
however, precautions should be taken to avoid application of
any voltage higher than the maximum rated voltages to this
circuit. For proper operation, V
constrained to the range:
Table 1. DC Electrical Specifications (V
V
V
V
V
I
I
I
I
LU
R
T
T
T
Ø
Ø
UL
MSL
ESD
V
V
V
V
V
V
V
Notes:
OUT
IK
OK
DD/
Parameter
Parameter
1. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
2. Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional
3. All terminals except V
4. V
s
a
DD
DD
in
out
j
DD
DDQ
REF
TT
IH
IL
OL
PS
Jc
JA
I
FL
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended period may affect reliability.
I
DD
SS
h
/V
DDQ
terminals.
Supply Voltage
Operating Voltage
Input Voltage
Output Voltage
DC Output Current
Continuous Clamp Current
Continuous Clamp Current
Continuous current through each V
Latch Up Immunity
Power Supply Ripple
Temperature, Storage
Temperature, Operating Ambient
Temperature, Junction
Dissipation, Junction to Case
Dissipation, Junction to Ambient
Flammability
Moisture Sensitivity
ESD Protection (Human Body Model)
Supply Voltage
Output Supply Voltage PC1600,2100,2700
Reference voltage
(V
Termination voltage
Input Voltage, High
Input Voltage, Low
Output Voltage, Low
REF
DD
= V
.
DDQ
/2)
[4]
Description
Description
[4]
in
PC1600,2100,2700
PC3200
PC3200
PC1600,2100,2700
PC3200
and V
[1, 2, 3]
DD
= Temperature = 0°C to +85 °C)
out
DD
should be
or V
SS
RESET
RESET
V
100 A, V
V
V
DD
DD
DD
Non-functional
Functional
Relative to V
Relative to V
V
V
Exceeds spec of
Ripple Frequency < 100 kHz
Non-functional
Functional
Functional
Mil-Spec 883E Method 1012.1
JEDEC (JESD 51)
By design and verification
By design and verification
/V
/V
I
O
= 2.3V
< 0 or V
< 0
DDQ
DDQ
V
Unused inputs must always be tied to an appropriate logic
voltage level (either V
SS
DD
= 2.3V to 2.7V, I
= 2.3V, I
< (V
Condition
Condition
= 2.3 to 2.7V
I
> V
in
SS
SS
or V
SS
OL
out
= 16 mA,
) < V
OL
SS
DD
=
.
or V
DD
V
40 mV
Min.
1.25
2000
REF
Min.
CY2SSTV16857
2.5
2.5
1.7
–65
2.3
2.3
).
0
0
MSL – 1
–
22.23
74.52
V – 0
100
V
Typ.
2.6
2.6
1.3
REF
V
+150
Max.
±100
V
+70
±50
±50
–50
150
165
2.7
2.7
DDQ
DD
Page 3 of 7
V
0 mV
Max.
REF
1.35
0.35
2.7
2.7
0.7
0.2
+4
mVp-p
Grade
Grade
°C/W
°C/W
VDC
VDC
VDC
VDC
Unit
mA
mA
mA
mA
mA
°C
°C
°C
V
Unit
V
V
V
V
V
V
V