AN2372 Freescale Semiconductor / Motorola, AN2372 Datasheet - Page 2

• Manufacturer Part Number: AN2372
• Description: Using the Output Compare TPU Function (OC) with the MPC500Family
• Manufacturer: Freescale Semiconductor / Motorola

Host-Initiated Pulse Mode
2.1
In host-initiated pulse mode, the CPU initiates a single transition: rising, falling, or a toggle of the previous
state. The CPU can force an immediate output, generating a pulse whose duration is a programmable delay
time. The CPU can also choose not to force an immediate output, causing the output transition to occur a
programmable delay time from a reference time. Both of these options are shown in Figure 1. OFFSET
contains this programmable delay. It is added to the reference time pointed to by REF_ADDR1 to form the
output transition time. REF_ADDR1 can reference the most recent TCR1 or TCR2 time value, the time
value of the last transition in REF_TIME, or a similar reference associated with another channel. This last
capability allows the OC function to synchronize to an event on another channel. In addition, in this mode,
the most recent TCR1 and TCR2 values are copied into the parameter RAM locations 0xEC and 0xEE.
The state of the pin state control (PSC) field in the channel control register determines whether or not the
output is immediate. The PSC field can be set to force an output state immediately when the channel is
enabled or it can be set to leave the pin at its previous state until a match occurs.
2.1.1
Immediate output is selected by setting the PSC field to force an output state immediately when the channel
is enabled and by pointing REF_ADDR1 to an address that contains the most recent TCR1 or TCR2 time
value. Immediately upon channel initialization, the TPU forces the channel pin to the state specified by the
PSC field. The TPU waits the number of clock counts specified in OFFSET and then forces the channel pin
to the state specified by the pin action control (PAC) field. For an example of a pulse generated by selecting
immediate output, see Figure 1a. In this example, the previous pin state was low. OFFSET is a value less
than 0x8000, and REF_ADDR1 points to the address containing the current TCR value. The PSC field is
set to force the pin high, and the PAC field is set to force the pin low. As soon as the channel is enabled, the
pin is forced high. Then, after the number of TCR clock counts specified in OFFSET has passed, the pin is
forced low. Thus, a single output pulse is generated.
2.1.2
If the PSC field is set to "do not force any state," the OC function generates a single transition instead of a
pulse. For an example of a single transition generated, see Figure 1b. In this example, the previous pin state
was low. OFFSET is a value less than 0x8000, and REF_ADDR1 points to either the most re- cent TCR
time value or a reference value such as REF_TIME or a similar value on another channel. The PSC field is
set to "do not force any state," and the PAC field is set to force the pin high. Thus, in this example the
previous pin state was low, and the pin does not go high until (REF_ADDR1) + OFF- SET clock counts
after TCR time (REF_ADDR1).
2
Host-Initiated Pulse Mode
Immediate Output Selected
Immediate Output Not Selected
Freescale Semiconductor, Inc.
For More Information On This Product,
Using the Output Compare TPU Function
Go to: www.freescale.com
MOTOROLA