AN2414 Freescale Semiconductor / Motorola, AN2414 Datasheet - Page 3

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AN2414

Manufacturer Part Number
AN2414
Description
CMOS Signal Interface (CSI) Module Supplementary Information for MC9328MX1 and MC9328MXL Application Note
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
3 Sensor Interface Operation
3.1 Gate Clock Mode
Frame starts with a positive pulse on VSYNC. This triggers a SOF interrupt and resets the internal logic at the
same time. The polarity of SOF is programmable, i.e. triggered by rising or falling edge.
MOTOROLA
2. Set CLR_STATFIFO to ’1’, then STAT FIFO is cleared immediately & kept at reset state.
3. When SOF arrives, STAT FIFO is released from reset state and starts working.
4. Set CLR_RXFIFO to ’1’, then RX FIFO is cleared immediately & re-enter work mode at the
5. After the arrival of SOF, CLR_STATFIFO & CLR_RXFIFO are both reset to ’0’ by internal
6. For next frame, need to repeat 2 - 6.
same time.
logic.
STATFIFO is kept
at reset stat
Write FCC = ’0’
1
st
SOF
=> STATFIFO is cleared immediately
Write CLR_STATFIFO = ’1’
1. STATFIFO starts working
2. CLR_STATFIFO is reset
=> RXFIFO is cleared immediately
Write CLR_RXFIFO = ’1’
1. RXFIFO starts working
2. CLR_RXFIFO is reset
Freescale Semiconductor, Inc.
For More Information On This Product,
MC9328MX1/MXL Application Note
Engineering Draft / Preliminary
Go to: www.freescale.com
Figure 3.
Figure 4.
STATFIFO is kept
at reset stat
2
nd
SOF
=> STATFIFO is cleared immediately
Write CLR_STATFIFO = ’1’
=> RXFIFO is cleared immediately
1. STATFIFO starts working
2. CLR_STATFIFO is reset
Write CLR_RXFIFO = ’1’
1. RXFIFO starts working
2. CLR_RXFIFO is reset
Sensor Interface Operation
3

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