AN2536 Freescale Semiconductor / Motorola, AN2536 Datasheet - Page 13

• Manufacturer Part Number: AN2536
• Description: MC9328MX1 and MC9328MXL High Speed Layout Design Guidelines
• Manufacturer: Freescale Semiconductor / Motorola

Freescale Semiconductor, Inc.
MC9328MX1/MXL Case Study
constant. Therefore, for high-speed designs, you should perform the pre-layout signal integrity simulation
with silicon input/output buffer information specification (IBIS) models before using the series termination
scheme.
3 MC9328MX1/MXL Case Study
The critical high speed signals are associated with the SDRAM and SyncFlash memory interface. The
clock signal, SDCLK, of the SDRAM and SyncFlash interface is targeted at 96 MHz. Two cases have been
analyzed, the MC9328MX1/MXL ADS v1.1 and a PDA from factor design, referred to as Demo v0.1.
Address/Data/Control
Figure 20. MC9328MX1/MXL ADS v1.1 Development Board and Layout Scheme
3.1 MC9328MX1 EVB v3.0 (ADS v1.1)
The Application Development System version 1.1 (ADS v1.1) was derived from the Evaluation Board
version 3.0 (EVB v3.0), where a portion of the memory bus connections are the same. The development
board is designed to exercise most features of the MC9328MX1/MXL and has an extra socket for memory
bus extension, known as the SODIMM connector. Also in this PCB design, we minimize the use of vias by
placing the SyncFlash memory and SDRAM memory chips on the same side of PCB. This layout method
results in lower trace resistance, inductance and capacitance. Refer to Figure 20 for an illustration of the
ADS v1.1 system under evaluation.
MOTOROLA
MC9328MX1/MXL Application Note
13
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