AN2826 Freescale Semiconductor / Motorola, AN2826 Datasheet

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AN2826

Manufacturer Part Number
AN2826
Description
DDR-SDRAM Layout Considerations for MCF547x/8x Processors
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
Freescale Semiconductor
Application Note
DDR-SDRAM Layout
Considerations for MCF547x/8x
Processors
by: Peter Highton
This application note describes various design criteria
that board and system designers should consider when
implementing Double Data Rate (DDR) Synchronous
Dynamic Random Access Memory (SDRAM) designs
with the MCF547x and MCF548x ColdFire family of
microprocessors. This application note discusses the
critical parts of a DDR SDRAM memory sub-system
design, particularly those related to printed circuit board
(PCB) layout.
1
The MCF547x & MCF548x families are the first
ColdFire microprocessor units (MPUs) with integrated
FPU (Floating Point Unit) and MMU (Memory
Management Unit) modules. They represent the highest
performance devices currently available within the
ColdFire processor family; the MCF547x @ 266 MHz
offers 410 Dhrystone V2.1 mips (millions of instructions
per second).
To provide the best price/performance ratio for
embedded system designers, the ColdFire family has an
integrated SDRAM memory controller module on-chip.
© Freescale Semiconductor, Inc., 2004. All rights reserved.
ColdFire Applications
Introduction
1
2
2.1
2.2
3
4
5
6
Introduction..........................................................1
DDR SDRAM Overview.......................................2
MCF547x/8x Validation Board DDR Layout ........9
Summary ...........................................................16
References ........................................................17
Document Revision History ...............................17
DDR SDRAM Controller Implemented on the
MCF547x/8x Family...........................................4
Layout Guidelines ..............................................7
Table of Contents
Rev. 1, 08/2004
AN2826

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