AN2826 Freescale Semiconductor / Motorola, AN2826 Datasheet - Page 8

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AN2826

Manufacturer Part Number
AN2826
Description
DDR-SDRAM Layout Considerations for MCF547x/8x Processors
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
DDR SDRAM Overview
Figure 5
The series termination (25 ohms) should be placed as close to the MPU as possible and the parallel
termination (50 ohms) as close as possible to DDR SDRAM. There can be some variation as to the specific
termination values used as PCB manufacturing materials vary and hence overall board impedance can
vary.
The validation PCB has 8 layers, the board stack for these layers is as follows:
8
VREF is decoupled from both SDVDD and VSS (GND).
To avoid crosstalk, keep address and command signals separate (i.e. a different routing layer)
from the data and data strobes.
Use different resistor packs for command/address and data/data strobes.
Use single series, single parallel termination (25 ohm series and 50 ohm parallel values are
recommended, but standard resistor packs with similar values can be substituted).
Series termination should be between the MCF547x and memory, but closest to the processor.
Parallel termination is at the end of the signal line (close to the DDR SDRAM).
0.1 uF, 1nF & 100pF decoupling capacitors (COG or NPO dielectric) are used with the
termination resistor packs.
Top Layer - signal routing
Power Plane - +3.3V
Power Plane - +2.5V
Routing Layer - Inner 1 routing
Routing Layer - Inner 2 routing
Power Plane - +1.5V
Ground Plane
Bottom layer - signal routing
shows the recommended termination for each of the signals between the MPU & DDR SDRAM.
MCF547X/8X
DDR-SDRAM Layout Considerations for MCF547x/8x Processors, Rev. 1
Figure 5. MCF547X/8X DDR SDRAM Termination Circuit
25 W
50 W
V
REF
DDR SDRAM
Freescale Semiconductor

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