AD8197B Analog Devices, AD8197B Datasheet - Page 19

• Manufacturer Part Number: AD8197B
• Description: 4:1 HDMI/DVI Switch with Equalization
• Manufacturer: Analog Devices

HIGH SPEED DEVICE MODES REGISTER
HS_EN: High Speed (TMDS) Channels Enable Bit
Table 6. HS_EN Description
HS_EN
0
1
HS_CH[1:0]: High Speed (TMDS) Switch Source Select Bus
Table 7. HS_CH Mapping
HS_CH[1:0]
00
01
10
11
AUXILIARY DEVICE MODES REGISTER
AUX_EN: Auxiliary (Low Speed) Switch Enable Bit
Table 8. AUX_EN Description
AUX_EN
0
1
AUX_CH[1:0]: Auxiliary (Low Speed) Switch Source
Select Bus
Table 9. AUX_CH Mapping
AUX_CH[3:0]
00
01
10
11
RECEIVER SETTINGS REGISTER
RX_TS: High Speed (TMDS) Channels Input Termination
On/Off Select Bit
Table 10. RX_TS Description
RX_TS
0
1
Description
High speed channels off, low power/standby mode
High speed channels on
O[3:0]
A[3:0]
B[3:0]
C[3:0]
D[3:0]
Description
All input terminations off (switches open)
Input termination resistor switch is controlled by
RX_TO[x] control bits from Input Term. Resistor
Control Registers 1 and 2.
Description
Auxiliary switch off
Auxiliary switch on
AUX_COM[3:0]
AUX_A[3:0]
AUX_B[3:0]
AUX_C[3:0]
AUX_D[3:0]
Description
High Speed Source A switched to output
High Speed Source B switched to output
High Speed Source C switched to output
High Speed Source D switched to output
Description
Auxiliary Source A switched
to output
Auxiliary Source B switched
to output
Auxiliary Source C switched
to output
Auxiliary Source D switched
to output
Rev. 0 | Page 19 of 28
INPUT TERMINATION SELECT REGISTER 1 AND
REGISTER 2
RX_TO[X]: High Speed (TMDS) Input Channel X
Termination Select Bit
Table 11. RX_TO[X] Description
RX_TO[X]
0
1
Table 12. RX_TO[X] Mapping
RX_TO[X]
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15
RECEIVE EQUALIZER REGISTER 1 AND REGISTER 2
RX_EQ[X]: High Speed (TMDS) Input X Equalization Level
Select Bit
Table 13. RX_EQ[X] Description
RX_EQ[X]
0
1
Table 14. RX_EQ[X] Mapping
RX_EQ[X]
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15
Description
Input termination for TMDS Channel X disconnected
Input termination for TMDS Channel X connected
Corresponding Input TMDS Channel
B0
B1
B2
B3
A0
A1
A2
A3
C3
C2
C1
C0
D3
D2
D1
D0
Description
Low equalization (6 dB)
High equalization (12 dB)
Corresponding Input TMDS Channel
B0
B1
B2
B3
A0
A1
A2
A3
C3
C2
C1
C0
D3
D2
D1
D0
AD8197B