ADP3208C ON Semiconductor, ADP3208C Datasheet - Page 25
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ADP3208C
Manufacturer Part Number
ADP3208C
Description
7-bit,programmable,dual- Phase,mobile,cpu,synchronous Buck Controller
Manufacturer
ON Semiconductor
Datasheet
1.ADP3208C.pdf
(41 pages)
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After 9ms in current limit, the ADP3207C will latch off . The
latch-off can be reset by removing and reapplying VCC, or by
recycling the EN pin low and high for a short time.
The latch-off can be reset by removing and reapplying VCC,
or by recycling the EN pin low and high for a short time.
CHANGING VID ON THE FLY
The ADP3208C is designed to track dynamically changing VID
code. As a consequence, the CPU VCC voltage can change without
the need to reset the controller or the CPU. This concept is com-
monly referred to as VID on-the-fly (VID OTF) transient. A
VID OTF can occur with either light or heavy load conditions. The
processor alerts the controller that a VID change is occurring
by changing the VID inputs in LSB incremental steps from the
start code to the finish code. The change can be either upwards
or downwards steps.
When a VID input changes, the ADP3208C detects the change
but ignores new code for a minimum of 400 ns. This delay is
required to prevent the device from reacting to digital signal
skew while the 7-bit VID input code is in transition. Additionally,
the VID change triggers a PWRGD masking timer to prevent
a PWRGD failure. Each VID change resets and retriggers the
internal PWRGD masking timer.
As listed in Table 6, during a VID transient, the ADP3208C
forces PWM mode regardless of the state of the system input
signals. For example, this means that if the chip is configured as
a dual-phase controller but is running in single-phase mode due
to a light load condition, a current overload event causes the
chip to switch to dual-phase mode to share the excessive load
until the delayed current limit latch-off cycle terminates.
In user-set single-phase mode, the ADP3208C usually runs in
RPM mode. When a VID transition occurs, however, the
ADP3208C switches to dual-phase PWM mode.
Light Load RPM DCM Operation
In single-phase normal mode, DPRSLP is pulled low and the
APD3208 operates in continuous conduction mode (CCM)
CURRENT LIMIT
APPLIED
Figure 26. Current Overload
PWRGD 2V/DIV
OUTPUT 0.5V/DIV
2ms/DIV
LATCHED
OFF
Rev. 1 | Page 25 of 41 | www.onsemi.com
over the entire load range. The upper and lower MOSFETs run
synchronously and in complementary phase. See Figure 27 for
the typical waveforms of the ADP3208C running in CCM with
a 7 A load current.
If DPRSLP is pulled high, the ADP3208C operates in RPM
mode. If the load condition is light, the chip enters
discontinuous conduction mode (DCM). Figure 28 shows a
typical single-phase buck with one upper FET, one lower FET,
an output inductor, an output capacitor, and a load resistor.
Figure 29 shows the path of the inductor current with the upper
FET on and the lower FET off. In Figure 30 the high-side FET is
off and the low-side FET is on. In CCM, if one FET is on, its
complementary FET must be off; however, in DCM, both high-
and low-side FETs are off and no current flows into the inductor
(see Figure 31). Figure 32 shows the inductor current and switch
node voltage in DCM.
In DCM with a light load, the ADP3208C monitors the switch
node voltage to determine when to turn off the low-side FET.
Figure 33 shows a typical waveform in DCM with a 1 A load
current. Between t
current flows through the source drain of the low-side FET and
creates a voltage drop across the FET with a slightly negative
switch node. As the inductor current ramps down to 0 A, the
switch voltage approaches 0 V, as seen just before t
switch voltage is approximately −6 mV, the low-side FET is
turned off.
Figure 32 shows a small, dampened ringing at t
the LC created from capacitance on the switch node, including
the C
The ADP3208C automatically goes into DCM with a light load.
Figure 33 shows the typical DCM waveform of the ADP3208C.
As the load increases, the ADP3208C enters into CCM. In
DCM, frequency decreases with load current. Figure 34 shows
switching frequency vs. load current for a typical design. In DCM,
switching frequency is a function of the inductor, load current,
input voltage, and output voltage.
DS
4
2
3
1
of the FETs and the output inductor. This ringing is normal.
Figure 27. Single-Phase Waveforms in CCM
SWITCH NODE 5V/DIV
LOW-SIDE GATE DRIVE 5V/DIV
1
and t
INDUCTOR CURRENT 5A/DIV
OUTPUT VOLTAGE 20mV/DIV
2
, the inductor current ramps down. The
400ns/DIV
ADP3208C
2
. This is caused by
2
. When the