SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 285

• Manufacturer Part Number: SPC8104
• Description: VGA LCD CONTROLLER
• Manufacturer: S-MOS Systems

SPC8104
SDU8104B
Rev 1.1 ISA Bus Evaluation Board
0C
1.3
Technical Description
16-Bit ISA-Bus Support
This board directly supports the 16-bit ISA-Bus and is intended to be used as a ISA-Bus Target
add-in-board. All SPC8104F0A related electrical connections come from the standard in-line ISA-
Bus connectors. Note that all Bus related signals are separated from the ISA-Bus and the
SPC8104F0A by voltage translations circuits. The nature of this design is such that the bus inter-
face I/O pins of the SPC8104F0A are 3.3V only.
512K DRAM Support
A one chip 3.3V, 512K solution is supported using a 256K x 16 DRAM. Symmetrical DRAM in an
TSOP package is supported. As the specific DRAM used are 3.3V, there are no voltage transla-
tors between the SPC8104F0A and the memory.
Monochrome LCD Support
The SPC8104F0A supports 4- and 8-bit Dual and Single monochrome STN LCD panels. All the
necessary signals are provided on the 40-pin ribbon cable header (J5) and pass through a 3V to
5V voltage translation circuitry. The interface signals are alternated with grounds on the cable to
reduce cross talk and noise related problems.
Refer to LCD Panel Configuration and LCD Signal Connector (J5) Pinout above for your specific
settings.
MIM Support
The SPC8104F0A also supports 4-bit MIM panels. All the necessary signals are provided on the
40-pin ribbon cable header (J5) and pass through a 3V to 5V voltage translation circuitry. The
interface signals are alternated with grounds on the cable to reduce cross talk and noise related
problems.
Refer to LCD Panel Configuration and LCD Signal Connector (J5) Pinout above for your specific
settings
VGA BIOS Support
A 32K EPROM contains the VGA BIOS. Support logic consists of an Address Decoder (C000H-
C7FFH), and a Data Buffer operating from the ISA-Bus. With the BIOS installed the board will
operate as a stand-alone Video adapter.
Power Save Modes
The SPC8104F0A supports three Power Save Modes that can be activated via either hardware or
software. A utility program is supplied to control these modes. Software control is performed by
directly writing the SPC8104F0A associated internal registers. The hardware power save modes
are controlled by input pins on the SPC8104F0A, however for the purpose of this design the asso-
ciated inputs are tied to their inactive states and are not used.
412-1.0
EV2-9
S-MOS Systems, Inc. • Tel: [phone] • Fax: [phone] • http://www.smos.com