SPCE061A Sunplus Technology Co., Ltd., SPCE061A Datasheet - Page 9

• Manufacturer Part Number: SPCE061A
• Description: 16-bit sound controller with 32k x 16 flash memory
• Manufacturer: Sunplus Technology Co., Ltd.

Special function in PortB
Default state: Pull Low
PWM: Pulse Width Modulation
Refer to the above table, the configuration of IOB2, IOB3, IOB4,
and IOB5 involves feedback function in which an OSC frequency
can be obtained from EXT1 (EXT2) by simply adding a RC circuit
between IOB2 (IOB3) and IOB4 (IOB5).
5.8. Timer/Counter
The SPCE061A provides two 16-bit timers/counters, TimerA and
TimerB. The TimerA is called a universal counter. TimerB is a
general-purpose counter.
from the combination of clock source A and clock source B. In
TimerB, the clock source is given from source C. When timer
overflows, an INT signal is sent to CPU to generate a time-out
signal.
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
Clock of Source A
IOB0
IOB1
IOB2
IOB3
IOB4
IOB5
IOB7
IOB8
IOB9
IOB10
PortB
Fosc/256
32768Hz
8192Hz
4096Hz
Fosc/2
EXT1
1
0
Special Function
SCK
SDA
EXT1
Feedback
Output1
EXT2
Feedback
Output2
Feedback Input1
Feedback Input2
Rx
APWMO
BPWMO
Tx
Clock of Source B
The clock source of TimerA comes
2048Hz
1024Hz
256Hz
TMB1
EXT2
4Hz
2Hz
TimerA PWM output
1
Serial interface clock
Serial interface data
External interrupt source 1(Negative-edge Triggered)
Works with IOB4 by adding a RC circuit between
them to get an OSC to EXT1 interrupt
External interrupt source 2(Negative-edge Triggered)
Works with IOB5 by adding a RC circuit between
them to get an OSC to EXT2 interrupt
UART Receiver
TimerB PWM output
UART Transmitter
Clock of Source C
Function Description
Fosc/256
32768Hz
8192Hz
4096Hz
Fosc/2
EXT1
1
0
9
Initially, write a value of N into a timer and select a desired clock
source, timer will start counting from N, N+1, N+2, ... through
FFFF. An INT (TimerA/TimerB) signal is generated at the next
clock after reaching “FFFF” and the INT signal is transmitted to
INT controller for further processing. At the same time, N will be
reloaded into timer and start all over again. The clock source A is
a high frequency source and clock source B is a low frequency
source. The combination of clock source A and B provides a
variety of speeds to TimerA. A “1” represents pass signal and not
gating. In contrast, “0” indicates deactivating timer. The EXT1
and EXT2 are the external clock sources. Moreover, counter can
generate time-out signal for input clock source to a four bits (16
levels) PWM pulse width counter. A variety of clock duration can
be generated and exported from IOB8 (APWMO) and IOB9
(BPWMO).
The following example is a 3/16-duration cycle.
waveform is made by selecting a pulse width through
Port_TimerA_Ctrl (W) [9:6].
generate a pulse width defined in control port.
signals can be applied for controlling the speed of motor or other
devices.
Refer to see SIO section
Refer to see SIO section
IOB2 set as input mode
IOB2 set as inverted output
IOB3 set as input mode
IOB3 set as inverted output
Refer to see UART section
Refer to Timer/Counter section
Refer to Timer/Counter section
Refer to UART section
As a result, each 16 cycles will
Note
SPCE061A
Preliminary Version: 0.1
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AUG. 02, 2002
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