LM3S1150 Luminary Micro, Inc, LM3S1150 Datasheet - Page 134
LM3S1150
Manufacturer Part Number
LM3S1150
Description
Lm3s1150 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1150.pdf
(513 pages)
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Reset
Reset
Type
Type
Hibernation Module
Hibernation Interrupt Mask (HIBIM)
Base 0x400F.C000
Offset 0x014
Type R/W, reset 0x0000.0000
134
Bit/Field
31:4
3
2
1
0
RO
RO
31
15
0
0
Register 6: Hibernation Interrupt Mask (HIBIM), offset 0x014
This register is the interrupt mask register for the Hibernation module interrupt sources.
RO
RO
30
14
0
0
RTCALT1
RTCALT0
LOWBAT
reserved
RO
RO
29
13
0
0
EXTW
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
R/W
RO
RO
RO
26
10
0
0
reserved
0x000.0000
Reset
RO
RO
25
0
9
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
External Wake-Up Interrupt Mask
Low Battery Voltage Interrupt Mask
RTC Alert1 Interrupt Mask
RTC Alert0 Interrupt Mask
Value
Value
Value
Value
reserved
0
1
0
1
0
1
0
1
RO
RO
23
Description
Masked
Unmasked
Description
Masked
Unmasked
Description
Masked
Unmasked
Description
Masked
Unmasked
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
EXTW
R/W
RO
19
0
3
0
LOWBAT
R/W
RO
18
0
2
0
RTCALT1
July 26, 2008
R/W
RO
17
0
1
0
RTCALT0
R/W
RO
16
0
0
0
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