LM3S1150 Luminary Micro, Inc, LM3S1150 Datasheet - Page 232
LM3S1150
Manufacturer Part Number
LM3S1150
Description
Lm3s1150 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1150.pdf
(513 pages)
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Reset
Reset
Type
Type
General-Purpose Timers
GPTM TimerB Interval Load (GPTMTBILR)
Timer0 base: 0x4003.0000
Timer1 base: 0x4003.1000
Timer2 base: 0x4003.2000
Timer3 base: 0x4003.3000
Offset 0x02C
Type R/W, reset 0x0000.FFFF
232
Bit/Field
31:16
15:0
R/W
RO
31
15
0
1
R/W
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C
This register is used to load the starting count value into TimerB. When the GPTM is configured to
a 32-bit mode, GPTMTBILR returns the current value of TimerB and ignores writes.
RO
30
14
0
1
R/W
reserved
RO
29
13
TBILRL
0
1
Name
R/W
RO
28
12
0
1
R/W
RO
27
11
0
1
Type
R/W
RO
R/W
RO
26
10
0
1
0xFFFF
0x0000
Reset
R/W
RO
25
0
9
1
Preliminary
R/W
RO
24
0
8
1
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM TimerB Interval Load Register
When the GPTM is not configured as a 32-bit timer, a write to this field
updates GPTMTBILR. In 32-bit mode, writes are ignored, and reads
return the current value of GPTMTBILR.
reserved
TBILRL
R/W
RO
23
0
7
1
R/W
RO
22
0
6
1
R/W
RO
21
0
5
1
R/W
RO
20
0
4
1
R/W
RO
19
0
3
1
R/W
RO
18
0
2
1
July 26, 2008
R/W
RO
17
0
1
1
R/W
RO
16
0
0
1
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