LM3S1911 Luminary Micro, Inc, LM3S1911 Datasheet - Page 25

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LM3S1911

Manufacturer Part Number
LM3S1911
Description
Lm3s1911 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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July 26, 2008
Analog Comparators
I
GPIOs
Power
2
C
False-start-bit detection
Line-break generation and detection
Two independent integrated analog comparators
Configurable for output to: drive an output pin or generate an interrupt
Compare external pin input to external pin input or to internal programmable voltage reference
Two I
Master and slave receive and transmit operation with transmission speed up to 100 Kbps in
Standard mode and 400 Kbps in Fast mode
Interrupt generation
Master with arbitration and clock synchronization, multimaster support, and 7-bit addressing
mode
23-60 GPIOs, depending on configuration
5-V-tolerant input/outputs
Programmable interrupt generation as either edge-triggered or level-sensitive
Low interrupt latency; as low as 6 cycles and never more than 12 cycles
Bit masking in both read and write operations through address lines
Pins configured as digital inputs are Schmitt-triggered.
Programmable control for GPIO pad configuration:
On-chip Low Drop-Out (LDO) voltage regulator, with programmable output user-adjustable
from 2.25 V to 2.75 V
Weak pull-up or pull-down resistors
2-mA, 4-mA, and 8-mA pad drive for digital communication; up to four pads can be
configured with an 18-mA pad drive for high-current applications
Slew rate control for the 8-mA drive
Open drain enables
Digital input enables
2
C modules
Preliminary
LM3S1911 Microcontroller
25

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