LM3S6610 Luminary Micro, Inc, LM3S6610 Datasheet - Page 17

• Manufacturer Part Number: LM3S6610
• Description: Lm3s6610 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

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Ethernet Controller ...................................................................................................................... 382
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Analog Comparators ................................................................................................................... 426
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July 25, 2008
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Ethernet MAC Raw Interrupt Status (MACRIS), offset 0x000 ............................................ 391
Ethernet MAC Interrupt Acknowledge (MACIACK), offset 0x000 ....................................... 393
Ethernet MAC Interrupt Mask (MACIM), offset 0x004 ....................................................... 394
Ethernet MAC Receive Control (MACRCTL), offset 0x008 ................................................ 395
Ethernet MAC Transmit Control (MACTCTL), offset 0x00C ............................................... 396
Ethernet MAC Data (MACDATA), offset 0x010 ................................................................. 397
Ethernet MAC Individual Address 0 (MACIA0), offset 0x014 ............................................. 399
Ethernet MAC Individual Address 1 (MACIA1), offset 0x018 ............................................. 400
Ethernet MAC Threshold (MACTHR), offset 0x01C .......................................................... 401
Ethernet MAC Management Control (MACMCTL), offset 0x020 ........................................ 402
Ethernet MAC Management Divider (MACMDV), offset 0x024 .......................................... 403
Ethernet MAC Management Transmit Data (MACMTXD), offset 0x02C ............................. 404
Ethernet MAC Management Receive Data (MACMRXD), offset 0x030 .............................. 405
Ethernet MAC Number of Packets (MACNP), offset 0x034 ............................................... 406
Ethernet MAC Transmission Request (MACTR), offset 0x038 ........................................... 407
Ethernet PHY Management Register 0 – Control (MR0), address 0x00 ............................. 408
Ethernet PHY Management Register 1 – Status (MR1), address 0x01 .............................. 410
Ethernet PHY Management Register 2 – PHY Identifier 1 (MR2), address 0x02 ................. 412
Ethernet PHY Management Register 3 – PHY Identifier 2 (MR3), address 0x03 ................. 413
Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4), address
0x04 ............................................................................................................................. 414
Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page Ability
(MR5), address 0x05 ..................................................................................................... 416
Ethernet PHY Management Register 6 – Auto-Negotiation Expansion (MR6), address
0x06 ............................................................................................................................. 417
Ethernet PHY Management Register 16 – Vendor-Specific (MR16), address 0x10 ............. 418
Ethernet PHY Management Register 17 – Interrupt Control/Status (MR17), address
0x11 .............................................................................................................................. 420
Ethernet PHY Management Register 18 – Diagnostic (MR18), address 0x12 ..................... 422
Ethernet PHY Management Register 19 – Transceiver Control (MR19), address 0x13 ....... 423
Ethernet PHY Management Register 23 – LED Configuration (MR23), address 0x17 ......... 424
Ethernet PHY Management Register 24 –MDI/MDIX Control (MR24), address 0x18 .......... 425
Analog Comparator Masked Interrupt Status (ACMIS), offset 0x00 .................................... 432
Analog Comparator Raw Interrupt Status (ACRIS), offset 0x04 ......................................... 433
Analog Comparator Interrupt Enable (ACINTEN), offset 0x08 ........................................... 434
Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x10 ......................... 435
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C Master Masked Interrupt Status (I2CMMIS), offset 0x018 ........................................... 370
C Master Interrupt Clear (I2CMICR), offset 0x01C ......................................................... 371
C Master Configuration (I2CMCR), offset 0x020 ............................................................ 372
C Slave Own Address (I2CSOAR), offset 0x000 ............................................................ 374
C Slave Control/Status (I2CSCSR), offset 0x004 ........................................................... 375
C Slave Data (I2CSDR), offset 0x008 ........................................................................... 377
C Slave Interrupt Mask (I2CSIMR), offset 0x00C ........................................................... 378
C Slave Raw Interrupt Status (I2CSRIS), offset 0x010 ................................................... 379
C Slave Masked Interrupt Status (I2CSMIS), offset 0x014 .............................................. 380
C Slave Interrupt Clear (I2CSICR), offset 0x018 ............................................................ 381
Preliminary
LM3S6610 Microcontroller
17