LM3S6610 Luminary Micro, Inc, LM3S6610 Datasheet - Page 494

• Manufacturer Part Number: LM3S6610
• Description: Lm3s6610 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Signal Tables
20
20.1
494
Signal Tables
The following tables list the signals available for each pin. Functionality is enabled by software with
the GPIOAFSEL register.
Important:
Table 20-1 on page 494 shows the pin-to-signal-name mapping, including functional characteristics
of the signals. Table 20-2 on page 498 lists the signals in alphabetical order by signal name.
Table 20-3 on page 503 groups the signals by functionality, except for GPIOs. Table 20-4 on page
506 lists the GPIO pins and their alternate functionality.
100-Pin LQFP Package Pin Tables
Table 20-1. Signals by Pin Number
Pin Number
10
11
12
1
2
3
4
5
6
7
8
9
All multiplexed pins are GPIOs by default, with the exception of the five JTAG pins (PB7
and PC[3:0]) which default to the JTAG functionality.
Pin Name
VDDA
GNDA
PWM0
PhA0
U1Rx
PE7
C2o
PE6
C1o
PE5
PE4
LDO
VDD
GND
PD0
PD1
PD2
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
-
-
-
-
-
I
I
Buffer Type
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Description
GPIO port E bit 7
Analog comparator 2 output
GPIO port E bit 6
Analog comparator 1 output
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
GPIO port E bit 5
GPIO port E bit 4
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDD25 pins
at the board level in addition to the decoupling
capacitor(s).
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
GPIO port D bit 0
PWM 0
GPIO port D bit 1
QEI module 0 Phase A
GPIO port D bit 2
UART module 1 receive. When in IrDA mode,
this signal has IrDA modulation.
July 25, 2008