LM3S2965 Luminary Micro, Inc, LM3S2965 Datasheet - Page 257
LM3S2965
Manufacturer Part Number
LM3S2965
Description
Lm3s2965 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S2965.pdf
(599 pages)
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Reset
Reset
Type
Type
Watchdog Masked Interrupt Status (WDTMIS)
Base 0x4000.0000
Offset 0x014
Type RO, reset 0x0000.0000
July 25, 2008
Bit/Field
31:1
0
RO
RO
31
15
0
0
Register 6: Watchdog Masked Interrupt Status (WDTMIS), offset 0x014
This register is the masked interrupt status register. The value of this register is the logical AND of
the raw interrupt bit and the Watchdog interrupt enable bit.
RO
RO
30
14
0
0
WDTMIS
reserved
RO
RO
29
13
0
0
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
26
10
0
0
Reset
0x00
RO
RO
25
0
9
0
0
Preliminary
reserved
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Watchdog Masked Interrupt Status
Gives the masked interrupt state (after masking) of the WDTINTR
interrupt.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
LM3S2965 Microcontroller
RO
RO
19
0
3
0
RO
RO
18
0
2
0
RO
RO
17
0
1
0
WDTMIS
RO
RO
16
0
0
0
257
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