HMP9701 Intersil Corporation, HMP9701 Datasheet - Page 6

• Manufacturer Part Number: HMP9701
• Description: AC97 Audio Codec
• Manufacturer: Intersil Corporation

BIT_CLK
Input Audio Slot 2: Status Data
This slot delivers control register read data.
Input Audio Slot 3: PCM Record Left Channel
This slot contains an audio sample captured by the left chan-
nel ADC. The resolution of the ADC is 16 bits and is MSB
justified in the 20-bit slot.
Input Audio Slot 4: PCM Record Right Channel
This slot contains an audio sample captured by the right
channel ADC. The resolution of the ADC is 16 bits and is
MSB justified in the 20-bit slot.
SDATA_IN
TABLE 7. BIT MAP FOR SLOT 3: LEFT CHANNEL RECORD DATA
TABLE 8. BIT MAP FOR SLOT 4: RIGHT CHANNEL RECORD DATA
“1” = AC LINK INTERFACE
SYNC
BITS
BITS
BITS
19:4
19:4
19:4
3:0
3:0
3:0
IS FUNCTIONAL
CODEC
READY
TABLE 6. BIT MAP FOR SLOT 1: STATUS DATA
Control Register
Read Data
Reserved
PCM Record Sample
Left Channel
Reserved
PCM Record Sample
Right Channel
Reserved
DESCRIPTION
DESCRIPTION
DESCRIPTION
12.288MHz
(“1” = TIME SLOT CONTAINS VALID DATA)
SLOT SLOT
TIME SLOT “VALID” BITS
1
81.4ns
Stuffed with 0’s if slot tagged invalid
Stuffed with 0’s
TAG PHASE
16-Bit audio sample from Left
Record ADC
Stuffed with 0’s
16-Bit audio sample from Right
Record ADC
Stuffed with 0’s
2
COMMENT
COMMENT
COMMENT
SLOT
FIGURE 6. AC LINK AUDIO INPUT FRAME
12
“0”
“0”
HMP9701
(48kHz)
20.8 s
“0”
6
Input Audio Slot 6: Microphone Record Channel
This slot contains an audio sample captured by the dedi-
cated microphone ADC. The resolution of the ADC is 16 bits
and is MSB justified in the 20-bit slot. This input allows
higher performance echo cancellation algorithms in speaker
phone applications.
TABLE 9. BIT MAP FOR SLOT 6: MICROPHONE RECORD DATA
Slots 5, 7-12: Reserved
Audio input slots 5, and 7-12 are reserved, and they are set
to “0”.
Low Power Modes
The HMP9701 may be put in a programmable powerdown state
to reduce power when no activity is required. The state of pow-
erdown is controlled by the Powerdown Register (26h). This
register provides 6 commands to powerdown various sections
of the HMP9701. A summary of the power down commands is
given in Table 10 with a more complete description given in the
Control Register Section. Note, the HMP9701 is a fully static
design which will preserve the contents of the internal control
registers if the internal clock is stopped.
BITS
19:4
PR0
PR1
PR2
PR3
PR4
PR5
BIT
3:0
TABLE 10. SUMMARY OF POWERDOWN REGISTER (26H)
BIT 19
PCM Record Sample
Microphone Channel
Reserved
Input Mux and ADC Powerdown
DAC Powerdown
Analog Mixer Powerdown (V
Analog Mixer Powerdown (V
Digital Interface (AC-Link) Powerdown (External CLK Off)
Internal CLK Disable
SLOT 1
DESCRIPTION
BIT 0 BIT 19
DATA PHASE
SLOT 2
FUNCTION
16-Bit Audio Sample From
Dedicated Microphone ADC
Stuffed with 0’s
REF
REF
BIT 0
On)
Off)
BIT 19
COMMENT
SLOT 12
BIT 0