HMP9701 Intersil Corporation, HMP9701 Datasheet - Page 9

• Manufacturer Part Number: HMP9701
• Description: AC97 Audio Codec
• Manufacturer: Intersil Corporation

Record Gain Registers (Index 1Ch and 1Eh)
These registers control the record gain for both the MIC
input and the selected stereo inputs (see Record Select
Register). The gain is programmed in steps of 1.5dB and
ranges from 0dB to +22.5dB. The MSB of the register is the
mute bit. When this bit is set to 1 the level for that channel(s)
is set at - dB.
General Purpose Register (Index 20h)
This register is used to control several miscellaneous func-
tions within the HMP9701. These include the selection of
Mic input source, the selection of MONO_OUT source, and
activation of ADC/DAC loopback mode. When loopback
mode is enabled, the ADC output is looped back to the DAC
input bypassing the AC-link, thus allowing for full system per-
formance measurements.
Powerdown Control/Status Register (Index 26h)
This register is used to program the HMP97901’s power-
down states and monitor subsystem status. The upper bits
of this register are used to power up/down individual sec-
tions within the codec as summarized in Table 18.
Default: 000 (MIC in)
Default: 8000h (0dB Gain with Mute on)
Default: 0000h
MUTE
0
0
1
LPBK
SL2:0
MIX
BIT
MS
0
1
2
3
4
5
6
7
TABLE 15. RECORD SELECT LEFT CHANNEL
TABLE 17. GENERAL PURPOSE CONTROL
TABLE 16. RECORD GAIN SETTINGS
0 1111
0 0000
PV3:0
x xxxx
Mono Output Select (0 = Mix, 1 = MIC)
Mic Select (1 = Mic2, 0 = Mic1)
ADC/DAC Loopback Mode
RIGHT RECORD SOURCE
+22.5dB Gain
0dB Gain
-
Stereo Mix Right
dB Gain
FUNCTION
LINE_IN_L
VIDEO_L
Mono Mix
PHONE
AUX_L
CD_L
MIC
FUNCTION
HMP9701
9
The lower byte of this register is used to monitor the status of
individual sections with in the HMP9701. The status bits, as
summarized in Table 19, indicate whether a subsection is in
it’s normal operational state (Ready). Note: the status bits
are read only, and writes to this register will have no effect on
the state of these bits.
When the AC-link “Codec Ready” indicator bit (SDATA_IN
slot 0, bit 15) is a 1, it indicates that the AC-link and AC‘97
control and status registers are in a fully operational state. It
is the responsibility of the digital controller to further probe
the Powerdown Control/Status Register to determine exactly
which subsections, if any, are ready.
Reserved Registers (Index 28h - 7ah)
These are reserved. Do not write to these registers.
Vendor ID Registers (Index 7Ch - 7Eh)
This register contains the Harris Semiconductor vendor ID.
The ID method is a Microsoft’s Plug and Play Vendor ID
code with F7:0 the first character of that ID, S7:0 the second
character and T7:0 the third character. These three charac-
ters are ASCII encoded, and they will read back as ‘HRS’.
The REV7:0 field is for the Revision number.
Default: na
Default: na
REF
DAC
ADC
PR0
PR1
PR2
PR3
PR4
PR5
ANL
BIT
BIT
Input Mux and ADC’s (1 = PWR Down, 0 = PWR Up)
DACs (1 = PWR Down, 0 = PWR Up)
Analog Mixer Powerdown with V
(1 = PWR Down, 0 = PWR Up)
Analog Mixer Powerdown with V
(1 = PWR Down, 0 = PWR Up)
Digital Interface (AC Link) powerdown (BCLK off)
(1 = PWR Down, 0 = PWR Up)
Internal Clock Disable (1 = CLK Off, 0 = CLK On)
V
(1 = V
Analog Mixer Powerdown
(1 = Mixer Up, 0 = Mixer Down)
DAC Ready for Audio Samples
(1 = Ready, 0 = Not Ready)
ADC Section Ready to Record
(1 = Ready, 0 = Not Ready)
REFs
TABLE 18. POWERDOWN CONTROL
TABLE 19. POWERDOWN STATUS
REF
at Nominal Level
Ready, 0 = V
FUNCTION
FUNCTION
REF
Down)
REF
REF
Left On
Turned Off