ATF22V10C ATMEL Corporation, ATF22V10C Datasheet

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ATF22V10C

Manufacturer Part Number
ATF22V10C
Description
High Performance E2 PLD
Manufacturer
ATMEL Corporation
Datasheet

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Features
Logic Diagram
Pin Configurations
Pin Name
CLK
IN
I/O
*
VCC
PD
www.DataSheet4U.com
Industry Standard Architecture
High Speed Electrically Erasable Programmable Logic Devices
CMOS and TTL Compatible Inputs and Outputs
Advanced Flash Technology
High Reliability CMOS Process
Dual-in-Line and Surface Mount Packages in Standard Pinouts
Low Cost Easy-to-Use Software Tools
5 ns Maximum Pin-to-Pin Delay
Latch Feature Holds Inputs to Previous Logic States
Reprogrammable
100% Tested
20 Year Data Retention
100 Erase/Write Cycles
2,000V ESD Protection
200 mA Latchup Immunity
Function
Clock
No Internal Connection
+5V Supply
Logic Inputs
Bidirectional Buffers
Power Down
Note:
nected. For superior performance, connect V
For PLCC, pins 1, 8, 15 and 22 can be left uncon-
to pin 1 and ground to 8, 15, 22.
DIP/SOIC
CLK/IN
IN/PD
GND
IN
IN
IN
IN
IN
IN
IN
IN
IN
1
2
3
4
5
6
7
8
9
10
11
12
TSSOP Top View
24
23
22
21
20
19
18
17
16
15
14
13
Top view
PLCC
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
CC
High
Performance
E
ATF22V10C
ATF22V10C
2
PLD
Rev. 0735C/22V10C-D–04/98

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ATF22V10C Summary of contents

Page 1

... I/O GND DIP/SOIC PLCC Top view For PLCC, pins and 22 can be left uncon- nected. For superior performance, connect V to pin 1 and ground to 8, 15, 22. High Performance 2 E PLD ATF22V10C ATF22V10C CC Rev. 0735C/22V10C-D–04/98 ...

Page 2

... Description The ATF22V10C is a high performance CMOS (Elec- trically Erasable) Programmable Logic Device (PLD) which utilizes Atmel’s proven electrically erasable Flash memory technology. Speeds down and power dissipation as low as 100 A are offered. All speed ranges are specified over the full 5V range for industrial temperature ranges, and 5V for commercial temperature ranges ...

Page 3

... MAX 0.5V OUT MIN -4 MIN CC ATF22V10C Min Typ Max -35 -10 10 Com. 85 130 Ind. 90 140 Com. 1 Ind. 1 Com. 150 Ind. 160 Com. 10 100 Ind. 10 100 -130 -0.5 0.8 2.0 V +0.75 CC Com ...

Page 4

... Asynchronous Reset Recovery Time AR t Setup Time, Synchronous Preset SP t Synchronous Preset to Clock Recovery Time SPR Notes: 1. See ordering information for valid part numbers. 2. 5.5 ns for DIP package devices. 3. 111 MHz for DIP package devices. www.DataSheet4U.com ATF22V10C 4 -5 Min ...

Page 5

... OUT Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Power Up Reset The registers in the ATF22V10Cs are designed to reset during power up point delayed slightly from V crossing V , all registers will be reset to the low state. RST The output state will depend on the polarity of the output buffer ...

Page 6

... REGISTERED OUTPUTS C LOCK Preload of Registered Outputs The ATF22V10C’s registers are provided with circuitry to allow loading of each register with either a high or a low. This feature will simplify testing since any state can be forced into the registers to control test sequencing. A JEDEC file with preload is generated when a source file with vectors is compiled ...

Page 7

... Functional Logic Diagram ATF22V10C www.DataSheet4U.com ATF22V10C 7 ...

Page 8

... Ordering Code Package ATF22V10C-5JC 28J ATF22V10C-7JC 28J ATF22V10C-7PC 24P3 ATF22V10C-7SC 24S ATF22V10C-7XC 24X ATF22V10C-10JC 28J ATF22V10C-10PC 24P3 ATF22V10C-10SC 24S ATF22V10C-10XC 24X ATF22V10C-10JI 28J ATF22V10C-10PI 24P3 ATF22V10C-10SI 24S ATF22V10C-10XI 24X Package Type Operation Range Commercial ( Commercial ( Commercial ( ...

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