ATF22V10C ATMEL Corporation, ATF22V10C Datasheet - Page 6

• Manufacturer Part Number: ATF22V10C
• Description: High Performance E2 PLD
• Manufacturer: ATMEL Corporation

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Preload of Registered Outputs
The ATF22V10C’s registers are provided with circuitry to
allow loading of each register with either a high or a low.
This feature will simplify testing since any state can be
forced into the registers to control test sequencing. A
JEDEC file with preload is generated when a source file
with vectors is compiled. Once downloaded, the JEDEC
file preload sequence will be done automatically by most
of the approved programmers after the programming.
Electronic Signature Word
There are 64 bits of programmable memory that are al-
ways available to the user, even if the device is secured.
These bits can be used for user-specific data.
Input and I/O Pin Keeper Circuits
The ATF16V8C contains internal input and I/O pin keeper
circuits. These circuits allow each ATF16V8C pin to hold
its previous value even when it is not being driven by an
external source or by the device’s output buffer. This helps
insure that all logic array inputs are at known, valid logic
levels. This reduces system power by preventing pins
from floating to indeterminate levels. By using pin keeper
6
Input Diagram
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POWER
REGISTERED
OUTPUTS
C LOCK
V
R
ST
ATF22V10C
t
PR
t
W
t
S
Security Fuse Usage
A single fuse is provided to prevent unauthorized copying
of the ATF22V10C fuse patterns. Once programmed, fuse
verify and preload are inhibited. However, the 64-bit User
Signature remains accessible.
The security fuse should be programmed last, as its effect
is immediate.
Programming/Erasing
Programming/erasing is performed using standard PLD
programmers. See CMOS PLD Programming Hardware &
Software Support for information on software/program-
ming.
circuits rather than pull-up resistors, there is no DC current
required to hold the pins in either logic state (high or low).
These pin keeper circuits are implemented as weak feed-
back inverters, as shown in the Input Diagram below.
These keeper circuits can easily be overdriven by stand-
ard TTL- or CMOS-compatible drivers. The typical over-
drive current required is 40 A.
Parameter Description
I/O Diagram
t
V
PR
RST
Power-Up
Reset Time
Power-Up
Reset
Voltage
Typ
600
3.8
1,000
Max
4.5
Units
ns
V