CS4348 Cirrus Logic, CS4348 Datasheet
CS4348
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CS4348 Summary of contents
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... Please see “Ordering Information” on page 23 3 Multibit Interpolation ∆Σ Modulator Filter Multibit Interpolation ∆Σ Modulator Filter Copyright © Cirrus Logic, Inc. 2005 (All Rights Reserved) CS4344/5/6/8 Section 8. for complete details. Switched Capacitor Left DAC and Output Filter ...
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TABLE OF CONTENTS 1. PIN DESCRIPTIONS .............................................................................................................................. 4 2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 5 SPECIFIED OPERATING CONDITIONS ................................................................................................... 5 ABSOLUTE MAXIMUM RATINGS .............................................................................................................. 5 DAC ANALOG CHARACTERISTICS .......................................................................................................... 6 DAC ANALOG CHARACTERISTICS - ALL MODES .................................................................................. 6 COMBINED INTERPOLATION & ...
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... Figure 6. Recommended Connection Diagram ......................................................................................... 12 Figure 7. CS4344 Data Format (I Figure 8. CS4345 Data Format (Left Justified) ......................................................................................... 14 Figure 9. CS4346 Data Format (Right Justified 24) .................................................................................. 15 Figure 10. CS4348 Data Format (Right Justified 16) ................................................................................ 15 Figure 11. De-Emphasis Curve (Fs = 44.1kHz) ........................................................................................ 16 Figure 12. CS4344/5/6/8 Initialization and Power-down Sequence .......................................................... 17 Figure 13. Single Speed Stopband Rejection ........................................................................................... 19 Figure 14 ...
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PIN DESCRIPTIONS DEM/SCLK LRCK MCLK Pin Name # SDIN 1 Serial Audio Data Input (Input) - Input for two’s complement serial audio data. 2 De-Emphasis/External Serial Clock Input (Input) - used for de-emphasis filter control or external serial DEM/SCLK ...
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CHARACTERISTICS AND SPECIFICATIONS (All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical performance characteristics and specifications are derived from measurements taken at nominal supply voltage = 25 ° C.) and T A SPECIFIED OPERATING CONDITIONS ...
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DAC ANALOG CHARACTERISTICS (Full-Scale Output Sine Wave, 997 Hz Measurement Bandwidth kHz, unless otherwise specified.) Parameter Dynamic Performance for CS4344/5/6/8-CZZ (-10 to 70°C) Dynamic Range 18 to 24-Bit 16-Bit Total Harmonic Distortion + Noise 18 to ...
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COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE (The filter characteristics have been normalized to the sample rate (Fs) and can be referenced to the desired sam- ple rate by multiplying the given characteristic by Fs.) See Parameter Combined Digital and ...
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DIGITAL INPUT CHARACTERISTICS Parameters High-Level Input Voltage Low-Level Input Voltage Input Leakage Current Input Capacitance for LRCK is ±20 µ A max POWER AND THERMAL CHARACTERISTICS Parameters Power Supplies Power Supply Current normal operation (Note 8) power-down ...
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SWITCHING CHARACTERISTICS - SERIAL AUDIO INTERFACE Parameters MCLK Frequency MCLK Duty Cycle Input Sample Rate All MCLK/LRCK ratios combined (Note 11) External SCLK Mode LRCK Duty Cycle (External SCLK only) SCLK Pulse Width Low SCLK Pulse Width High SCLK Duty ...
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LRCK SCLK SDATA LRCK SDATA *INTERNAL SCLK The SCLK pulses shown are internal to the CS4344/5/6/8. LRCK MCLK *INTERNAL SCLK SDATA * The SCLK pulses shown are internal to the CS4344/5/6/ slrs t slrd t sclkl t t ...
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... For internal routing applications please see the DAC analog output characteristics for loading limitations. +3 0.1 µF 1 µ 3.3 µF 7 AOUTL + 10 kΩ 3.3 µF CS4344 10 CS4345 AOUTR + CS4346 CS4348 10 kΩ 6 FILT+ 10 µ *3.3 0.1 µF 8 *10 Figure 6. Recommended Connection Diagram CS4344/5/6/8 Note* Left Audio 470Ω Output C R ...
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APPLICATIONS The CS4344 family accepts data at standard audio sample rates including 48, 44.1 and 32 kHz in SSM, 96, 88.2 and 64 kHz in DSM, and 192, 176.4 and 128 kHz in QSM. Audio data is input via ...
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Left Channel LRCK SCLK SDATA MSB - Internal SCLK Mode I²S, 16-Bit data and INT SCLK = MCLK/LRCK = 1024, 512, 256, 128 I² 24-Bit data and ...
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... INT SCLK = MCLK/LRCK = 1024, 512, 256, 128 INT SCLK = MCLK/LRCK = 768, 384, 192 INT SCLK = MCLK/LRCK = 1152 Figure 10. CS4348 Data Format (Right Justified 16 Right Justified, 24-Bit Data Data Valid on Rising Edge of SCLK ...
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De-Emphasis The CS4344 family includes on-chip digital de-emphasis. equal to 44.1 kHz. The frequency response of the de-emphasis curve will scale proportionally with changes in sample rate, Fs. The de-emphasis filter is active (inactive) if the DEM/SCLK pin is ...
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When changing clock ratio or sample rate it is recommended that zero data (or near zero data) be present on SDIN for at least 10 LRCK samples before the change is made. During the clocking change the DAC outputs will ...
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Grounding and Power Supply Decoupling As with any high resolution converter, the CS4344 family requires careful attention to power supply and grounding arrangements to optimize performance. with VA connected to a clean +3 supply. For ...
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FILTER PLOTS Figure 13. Single-Speed Stopband Rejection -10 0.45 0.46 0.47 0.48 0.49 0.5 0.51 Frequency (normalized to Fs) Figure 15. Single-Speed Transition Band 18 Figure 14. Single-Speed Transition ...
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Figure 17. Double-Speed Stopband Rejection 0.45 0.46 0.47 0.48 0.49 0.5 0.51 Frequency (normalized to Fs) Figure 19. ...
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Frequency(normalized to Fs) Figure 21. Quad-Speed Stopband Rejection 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 0.4 0.45 0.5 0.55 ...
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PARAMETER DEFINITIONS Total Harmonic Distortion + Noise (THD+N) The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified bandwidth (typically kHz), including distortion components. ...
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PACKAGE DIMENSIONS 10LD TSSOP (3 mm BODY) PACKAGE DRAWING TOP VIEW INCHES DIM MIN 0.0295 b 0.0059 c 0.0031 D -- 0.1181 BSC E -- 0.1929 BSC E1 -- ...
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... The CS4344 family differs by Serial Audio format as follows: • CS4344 — 24-bit, I²S • CS4345 — 24-bit, Left-Justified • CS4346 — 24-bit, Right-Justified • CS4348 — 16-bit, Right-Justified DS613F1 Package Pb-Free Grade Temp Range Commercial -10 to +70 °C Automotive -40 to +85 °C Commercial -10 to +70 ° ...
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... OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, the Cirrus Logic logo designs , and Popguard are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. ...