ST62T42B ST Microelectronics, ST62T42B Datasheet - Page 38

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ST62T42B

Manufacturer Part Number
ST62T42B
Description
8-BIT OTP/EPROM MCU WITH LCD DRIVER / EEPROM AND A/D CONVERTER
Manufacturer
ST Microelectronics
Datasheet

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ST62T42B/E42B
5.1 TIMER 1 & 2
The MCU features two on-chip Timer peripheral
named TIMER 1 & TIMER 2. Each of these timers
consist of an 8-bit counter with a 7-bit programma-
ble prescaler, giving a maximum count of 2
The content of the 8-bit counter can be read/writ-
ten in the Timer/Counter register, TCR, while the
state of the 7-bit prescaler can be read in the PSC
register. The control logic device is managed in
the TSCR register as described in the following
paragraphs.
The 8-bit counter is decremented by the output
(rising edge) coming from the 7-bit prescaler and
can be loaded and read under program control.
When it decrements to zero then the TMZ (Timer
Zero) bit in the TSCR is set to “1”. If the ETI (Ena-
ble Timer Interrupt) bit in the TSCR is also set to
“1”, an interrupt request is generated as described
in the Interrupt Chapter. The Timer interrupt can
be used to exit the MCU from WAIT mode.
The prescaler input is the internal frequency f
divided by 12 (TIMER 1 & 2). The prescaler decre-
Figure 20. Timer Working Principle
38/68
38
CLOCK
0
BIT0
BIT0
1
BIT1
BIT1
2
BIT2
BIT2
15
7-BIT PRESCALER
8-1 MULTIPLEXER
.
8-BIT COUNTER
BIT3
3
INT
BIT3
ments on the rising edge. Depending on the divi-
sion factor programmed by PS2, PS1 and PS0 bits
in the TSCR. The clock input of the timer/counter
register is multiplexed to different sources. For di-
vision factor 1, the clock input of the prescaler is
also that of timer/counter; for factor 2, bit 0 of the
prescaler register is connected to the clock input of
TCR. This bit changes its state at half the frequen-
cy of the prescaler input clock. For factor 4, bit 1 of
the PSC is connected to the clock input of TCR,
and so forth. The prescaler initialize bit, PSI, in the
TSCR register must be set to “1” to allow the pres-
caler (and hence the counter) to start. If it is
cleared to “0”, all the prescaler bits are set to “1”
and the counter is inhibited from counting. The
prescaler can be loaded with any value between 0
and 7Fh, if bit PSI is set to “1”. The prescaler tap is
selected by means of the PS2/PS1/PS0 bits in the
control register.
Figure 20 illustrates the Timer’s working principle.
BIT4
4
BIT4
BIT5
5
BIT5
BIT6
6
BIT6
BIT7
7
VA00186
PS0
PS1
PS2

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