AD9859 Analog Devices, Inc., AD9859 Datasheet - Page 13
AD9859
Manufacturer Part Number
AD9859
Description
400 Msps, 10-bit, 1.8 V Cmos Direct Digital Synthesizer
Manufacturer
Analog Devices, Inc.
Datasheet
1.AD9859.pdf
(24 pages)
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Table 5. Register Map
Register
Name
(Serial
Address)
Control
Function
Register
No.1
(CFR1)
(0x00)
Control
Function
Register No.
2 (CFR2)
(0x01)
Amplitude
Scale Factor
(ASF)
(0x02)
Amplitude
Ramp Rate
(ARR)
(0x03)
Frequency
Tuning
Word
(FTW0)
(0x04)
Phase
Offset Word
(POW0)
(0x05)
Bit
Range
<7:0>
<15:8>
<23:16>
<31:24>
<7:0>
<15:8>
<23:16>
<7:0>
<15:8>
<7:0>
<7:0>
<15:8>
<23:16>
<31:24>
<7:0>
<15:8>
(MSB)
Bit 7
Automatic
Auto Ramp Rate Speed
Not Used
Power-
Digital
Enable
Down
Sync
Not Used<1:0>
Control <1:0>
0x00 or 0x01, or 0x02 or 0x03: Bypass Multiplier
0x04 to 0x14: 4× to 20× Multiplication
Bit 6
Not Used
Not Used
Software
Manual
Sync
Not Used
REFCLK Multiplier
Bit 5
Not Used
AutoClr
Power-
Accum
Down
Phase
DAC
Frequency Tuning Word No. 0 <23:16>
Frequency Tuning Word No. 0 <31:24>
Amplitude Scale Factor Register <7:0>
Frequency Tuning Word No. 0 <15:8>
Amplitude Ramp Rate Register <7:0>
Frequency Tuning Word No. 0 <7:0>
Rev. 0 | Page 13 of 24
Phase Offset Word No. 0 <7:0>
Bit 4
Enable SINE
Clock Input
Power-
Output
Down
Amplitude Scale Factor Register <13:8>
Not Used
Phase Offset Word No. 0 <13:8>
Bit 3
Not Used
External
Power-
Down
Mode
Enable
Speed
High
Sync
Not Used
Bit 2
Hardware
Not Used
Load ARR
@ I/O UD
Accum.
Manual
Enable
Range
Phase
Clear
Sync
VCO
Bit 1
SYNC_CLK
Charge Pump Current
CRYSTAL
OUT Pin
Disable
Enable
Active
Input
SDIO
Only
OSK
Out
<1:0>
(LSB)
Bit 0
LSB First
Keying
Used
Used
Auto
OSK
Not
Not
AD9859
Default
Value
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00