ZEN2044F Zenic, ZEN2044F Datasheet - Page 11

• Manufacturer Part Number: ZEN2044F
• Description: 33MHz Up/down Counter
• Manufacturer: Zenic

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4-6. Default values of internal registers after reset
5. Registers
Regsiter/Mode
Counter
Preload reg.
Latch reg.
Command reg.
Status reg.
Table 6.
D7(LD)
D6(ZE1)
D5(ZE0)
D4(LT)
D3(RS1)
D2(RS0)
D1(BS1)
D0(BS0)
D7(AI)
D6(Z)
D5(A)
D4(B)
D3(DTR)
D2(U/D)
D1(EQA)
D0(U)
The
After RESET is asserted, the values of the internal registers and the system mode are set according to
A command register for controling the action of the counter.[write only]
A status register for indicating the internal state.[read only]
A preload register for storing the counter value to be loaded.[write only]
A reference register for storing the value to be compared with the counter.[write only]
A latch register for storing the counter value to be read by the CPU.[read only]
Note ) The counter value can be directly wrote without storing it in the preload register but we don't
ZEN2044F
recommend it.
has the following registers at each cannel.
The reset value
000000H
keeping the value
before reset
keeping the value
before reset
0
1
0
0
0
0
0
0
0
Depending on input Z/CLR
Depending on input A/UP
Depending on input B/DN
0
0
1
Depending on input U
(NOP)
ZNE
(NOP)
Up/down counter
Low byte
Table 6
Regsiter/Mode
System mode
Reference reg.
Reference reg.
A
B
- 11 -
The reset value
Mode 0
keeping the value
before reset
keeping the value
before reset
(
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ZEN2044F
ZEN2044F
)