DE28F800B3B150 Intel Corporation, DE28F800B3B150 Datasheet - Page 6
DE28F800B3B150
Manufacturer Part Number
DE28F800B3B150
Description
FAST BOOT BLOCK FLASH MEMORY FAMILY 8 AND 16 MBIT
Manufacturer
Intel Corporation
Datasheet
1.DE28F800B3B150.pdf
(47 pages)
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FAST BOOT BLOCK DATASHEET
2.0
This section describes the pinout and block
architecture of the device family.
2.1
Intel’s Fast Boot Block flash memory family
provides upgrade paths in each package pinout up
NOTES:
1.
2.
3.
6
Shaded connections indicate upgrade address connections. Lower density devices will not have upper address solder
balls. Routing is not recommended in this area.
A
Reference the Micro Ball Grid Array Package Mechanical Specification and Media Information on Intel’s World Wide Web
home page for detailed package specifications.
20
and A
PRODUCT DESCRIPTION
Pinouts
21
are the upgrade address for potential 32-Mbit and 64-Mbit devices (currently not on road map).
A
B
C
D
E
F
Figure 1. 56-Ball µBGA* Package Pinout (Top View, Ball Down)
WAIT# GND
V
A
A
A
A
1
CCQ
15
14
13
16
DQ
DQ
A
A
A
2
12
11
10
15
7
DQ
DQ
DQ
3
A
A
8
9
13
14
6
DQ
GND
GND
DQ
32M
A
64M
A
4
20
21
12
5
ADV#
RST#
CLK
DQ
V
5
CC
4
to the 16-Mbit density. The family is available in
for the 8- and 16-Mbit components are illustrated in
Figures 1 and 2.
2.2
The pin description table describes pin usage.
WE#
WP#
DQ
DQ
V
BGA CSP and 56-lead SSOP packages. Pinouts
6
CC
11
3
DQ
V
DQ
16M
V
A
A
7
CCQ
PP
18
Pin Description
19
10
2
DQ
DQ
DQ
A
8
A
PRODUCT PREVIEW
17
7
9
1
8
GND
OE#
DQ
9
A
A
A
4
5
6
0
10
CE#
A
A
A
A
1
2
3
0
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