LT1720 Linear Technology, LT1720 Datasheet

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LT1720

Manufacturer Part Number
LT1720
Description
4ns/ 150MHz Dual Comparator with Independent Input/Output Supplies
Manufacturer
Linear Technology
Datasheet

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FEATURES
TYPICAL APPLICATIO
APPLICATIO S
UltraFast: 4.5ns at 20mV Overdrive
Low Power: 4mA per Comparator
Optimized for 3V and 5V Operation
Pinout Optimized for High Speed Ease of Use
Input Voltage Range Extends 100mV
Below Negative Rail
TTL/CMOS Compatible Rail-to-Rail Outputs
Internal Hysteresis with Specified Limits
Low Dynamic Current Drain; 15 A/(V-MHz),
Dominated by Load In Most Circuits
High Speed Differential Line Receiver
Crystal Oscillator Circuits
Window Comparators
Threshold Detectors/Discriminators
Pulse Stretchers
Zero-Crossing Detectors
High Speed Sampling Circuits
2.7V to 6V Crystal Oscillator with TTL/CMOS Output
2.7V TO 6V
7ns at 5mV Overdrive
620
2k
U
220
0.01 F
1/2 LT1720
+
CRYSTAL (AT-CUT)
1MHz TO 10MHz
C1
1.8k
GROUND
CASE
2k
U
1720/21 TA01
OUTPUT
DESCRIPTIO
The LT
tors optimized for single supply operation, with a supply
voltage range of 2.7V to 6V. The input voltage range extends
from 100mV below ground to 1.2V below the supply voltage.
Internal hysteresis makes the LT1720/LT1721 easy to use
even with slow moving input signals. The rail-to-rail outputs
directly interface to TTL and CMOS. Alternatively, the sym-
metric output drive can be harnessed for analog applications
or for easy translation to other single supply logic levels.
The LT1720 is available in the 8-pin MSOP and SO packages;
three pins per comparator plus power and ground. The
LT1721 is available in the 16-pin SSOP and S packages.
The pinouts of the LT1720/LT1721 minimize parasitic effects
by placing the most sensitive inputs (inverting) away from the
outputs, shielded by the power rails. The LT1720/LT1721 are
ideal for systems where small size and low power are
paramount.
UltraFast is a trademark of Linear Technology Corporation.
, LTC and LT are registered trademarks of Linear Technology Corporation.
with Rail-to-Rail Outputs
®
1720/LT1721 are UltraFast
8
7
6
5
4
3
2
1
0
0
3V/5V Comparators
Propagation Delay vs Overdrive
4.5ns, Single Supply
RISING EDGE
U
10
(t
PDLH
OVERDRIVE (mV)
)
20
LT1720/LT1721
Dual/Quad,
FALLING EDGE
30
25 C
V
V
C
(t
STEP
CC
LOAD
TM
PDHL
= 5V
dual/quad compara-
= 100mV
= 10pF
40
)
1720/21 TA02
50
1

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LT1720 Summary of contents

Page 1

... TTL and CMOS. Alternatively, the sym- metric output drive can be harnessed for analog applications or for easy translation to other single supply logic levels. The LT1720 is available in the 8-pin MSOP and SO packages; three pins per comparator plus power and ground. The LT1721 is available in the 16-pin SSOP and S packages. ...

Page 2

... GND PACKAGE 8-LEAD PLASTIC 150 C, = 200 C/ W JMAX JA ORDER PART S8 NUMBER PART MARKING LT1720CS8 1720 LT1720IS8 1720I The denotes specifications that apply over the full operating temperature = 5V 1V 10pF OUT CONDITIONS (Note 2) (Note 3) (Note 3) (Note 3) ...

Page 3

... Note 7: Propagation delay measurements made with 100mV steps. Overdrive is measured relative to V Note low values of overdrive. The LT1720/LT1721 are 100% tested with a 100mV step and 20mV overdrive. Correlation tests have shown that t limits can be guaranteed with this test, if additional DC tests are PD performed to guarantee that all internal bias conditions are correct ...

Page 4

... LT1720/LT1721 W U TYPICAL PERFORMANCE CHARACTERISTICS Input Offset and Trip Voltages vs Supply Voltage TRIP –1 – V TRIP – –3 2.5 4.0 4.5 5.0 5.5 6.0 3.0 3.5 SUPPLY VOLTAGE (V) 1720/21 G01 Input Current vs Differential Input Voltage –1 – 2 – 3 – 4 – 5 – ...

Page 5

... C (Pin 9): Inverting Input of Comparator C. +IN C (Pin 10): Noninverting Input of Comparator C. V (Pins 11, 14): Positive Supply Voltage. CC OUT C (Pin 12): Output of Comparator C. OUT D (Pin 13): Output of Comparator D. +IN D (Pin 15): Noninverting Input of Comparator D. –IN D (Pin 16): Inverting Input of Comparator D. LT1720/LT1721 Supply Current vs Frequency ...

Page 6

... Response Time Test Circuit 0V DUT –100mV 1/2 LT1720 OR 1/4 LT1721 25 25 50k 50 V1* 0.1 F 130 2N3866 1N5711 400 750 *V1 = –1000 • (OVERDRIVE + V NOTE: RISING EDGE TEST SHOWN. FOR FALLING EDGE, REVERSE LT1720 INPUTS –5V 2 1000 10k 1 8 1/2 LT1112 + – 1000 V 7 1000 V 10k 15 1000 ...

Page 7

... Input Bias Current Input bias current is measured with both inputs held at 1V. As with any PNP differential input stage, the LT1720/ LT1721 bias current flows out of the device. With a differential input voltage of even just 100mV or so, there will be zero bias current into the higher of the two inputs, while the current flowing out of the lower input will be twice the measured bias current ...

Page 8

... The ground trace from Pin 5 runs under the device up to the bypass capacitor, shielding the inputs from the outputs. Note the use of a common via for the LT1720 and the bypass capacitor, which minimizes interference from high frequency energy running around the ground plane or power distribution traces ...

Page 9

... The exact amount of hysteresis will vary from part to part as indicated in the specifications table. The hysteresis level will also vary slightly with changes in supply voltage and common mode voltage. A key advantage of the LT1720/ LT1721 is the significant reduction in these effects, which is important whenever an LT1720/LT1721 is used to de- tect a threshold crossing in one direction only ...

Page 10

... Figure 5b shows a three resistor level translator for inter- facing the LT1720/LT1721 to ECL running off the same supply rail. No pull-down on the output of the LT1720/ LT1721 is needed, but pull-down R3 limits the V the PECL gate. This is needed because ECL inputs have both a minimum and maximum V proper operation ...

Page 11

... LSTTL 270 820 (a) STANDARD TTL TO PECL TRANSLATOR R1 1/2 LT1720 (b) LT1720/LT1721 OUTPUT TO PECL TRANSLATOR 3V 1/2 LT1720 R4 (c) 3V LT1720/LT1721 OUTPUT TO PECL TRANSLATOR 1/2 LT1720 (d) LT1720/LT1721 OUTPUT TO STANDARD ECL TRANSLATOR NOT USE FOR LT1720/LT1721 LEVEL TRANSLATION. SEE TEXT 10KH 10KH 5.2V ...

Page 12

... U APPLICATIONS INFORMATION Circuit Description The block diagram of one comparator in the LT1720/LT1721 is shown in Figure 6. There are differential inputs (+ IN/– IN), an output (OUT), a single positive supply (V and ground (GND). All comparators are completely inde- pendent, sharing only the power and ground pins. The ...

Page 13

... All comparators have some degree of dispersion, defined as a change in propagation delay versus input overdrive. The propagation delay of the LT1720/LT1721 will vary with overdrive, from a typical of 4.5ns at 20mV overdrive to 7ns at 5mV overdrive (typical). The LT1720/ – . The slew currents of LT1721’s primary source of dispersion is the hysteresis stage ...

Page 14

... Crystal Oscillators A simple crystal oscillator using one comparator of an LT1720/LT1721 is shown on the first page of this data sheet. The 2k-620 resistor pair set a bias point at the comparator’s noninverting input. The 2k-1.8k-0.1 F path sets the inverting input node at an appropriate DC average level based on the output. The crystal’ ...

Page 15

... SUPPLY VOLTAGE (V) Figure 8. Timing Skew of Figure 7’s Circuit applications. This circuit works well because of the two matched delays and rail-to-rail style outputs of the LT1720. The circuit in Figure 9 shows a crystal oscillator circuit that generates two nonoverlapping clocks by making full use of the two independent comparators of the LT1720. ...

Page 16

... IN – REF Figure 11. Building Blocks for Timing Skew Generation with the LT1720 high speed instrumentation. The circuit in Figure delay detector which will output a pulse when signals X and Y are out of sync (specifically, when X is high and Y is low). Note that the addition of an identical circuit to detect the opposite situation (X low and Y high) allows for full skew detection ...

Page 17

... Z C1 U1C 301 * 5.6pF 1/4 LT1721 301 * R7 261 * * 1% METAL FILM RESISTOR ** 270pF 2 FOR REDUCED LEAD INDUCTANCE Figure 13. Output Pulse Due to Delay of Y Input Pulse LT1720/LT1721 OPTIONAL LOGARITHMIC PULSE STRETCHER (SEE TEXT) 5V CAPTURE R1 499 * + V U1D C 1/4 LT1721 C2 540pF – 475 * + ...

Page 18

... LT1720/LT1721 U U APPLICATIONS INFORMATION Optional Logarithmic Pulse Stretcher The fourth comparator of the quad LT1721 can be put to work as a logarithmic pulse stretcher. This simple circuit can help tremendously if you don’t have a fast enough oscilloscope (or control circuit) to easily capture 3ns pulse widths (or faster). When an input pulse occurs ...

Page 19

... Fast Waveform Sampler Figure 17 uses a diode-bridge-type switch for clean, fast waveform sampling. The diode bridge, because of its inherent symmetry, provides lower AC errors than other semiconductor-based switching technologies. This cir- cuit features 20dB of gain, 10MHz full power bandwidth LT1720/LT1721 /V drops which grow ...

Page 20

... TO – 5V) 1.5k 3.6k 0 1/2 LT1720 IN – SKEW 2k COMP SAMPLE COMMAND 2.5k + 10pF 1/2 LT1720 – Figure 17. Fast Waveform Sampler Using the LT1720 for Timing-Skew Compensation 750 1.37k 215 681 100pF 681 4.22k 453 Figure 16. 10ns Triple Overlap Generator 5V 2.2k ...

Page 21

... Further desirable to be able to set the amount of time skew via a tuning voltage. Figure 18’s circuit does this by utilizing the LT1720 to digitize phase information from a varactor- tuned time domain bridge control signal provides from a 2 ...

Page 22

... The matched delays of a monolithic dual are well suited for those cases where the coincidence of two pulses needs to be detected. The circuit of Figure coincidence detector that uses an LT1720 and discrete components as a fast AND gate. The reference level is set to 1V, an arbitrary threshold. Only when both input signals exceed this will a coincidence be detected ...

Page 23

... PLIFIED SCHE ATIC LT1720/LT1721 23 ...

Page 24

... LT1720/LT1721 PACKAGE DESCRIPTION 0.010 – 0.020 (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.016 – 0.050 (0.406 – 1.270) * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" ...

Page 25

... Plastic MSOP (LTC DWG # 05-08-1660) 0.118 0.004* (3.00 0.102) 0.193 0.006 (4.90 0.15) 0.040 0.006 (1.02 0.15) 0 – 6 TYP SEATING PLANE 0.012 0.021 0.006 (0.30) (0.53 0.015) 0.0256 REF (0.65) BSC LT1720/LT1721 0.118 0.004** (3.00 0.102 0.034 0.004 (0.86 0.102) 0.006 0.004 (0.15 0.102) MSOP (MS8) 1098 25 ...

Page 26

... LT1720/LT1721 PACKAGE DESCRIPTION 0.010 – 0.020 45 (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.016 – 0.050 (0.406 – 1.270) * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" ...

Page 27

... TYP 0.008 – 0.012 (0.203 – 0.305) LT1720/LT1721 0.189 – 0.196* (4.801 – 4.978) 0.009 (0.229 REF 0.150 – 0.157** (3.810 – 3.988) ...

Page 28

... For detecting short pulses from a single sensor, a pulse stretcher is often required. The circuit of Figure 20 acts as a one-shot, stretching the width of an incoming pulse to a consistent 100ns. Unlike a logic one-shot, this LT1720- based circuit requires only 100pV-s of stimulus to trigger. The circuit works as follows: Comparator C1 functions as a threshold detector, whereas comparator C2 is confi ...

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