LTC1196-1BC Linear Technology, LTC1196-1BC Datasheet - Page 21

• Manufacturer Part Number: LTC1196-1BC
• Description: 8-Bit/ SO-8/ 1MSPS ADCs with Auto-Shutdown Options
• Manufacturer: Linear Technology

Offset with Reduced V
The offset of the LTC1196 has a larger effect on the output
code when the ADC is operated with reduced reference
voltage. The offset (which is typically a fixed voltage)
becomes a larger fraction of an LSB as the size of the LSB
is reduced. The typical curve of Unadjusted Offset Error vs
Reference Voltage shows how offset in LSBs is related to
reference voltage for a typical value of V
a V
becomes 0.5LSB with a 1V reference and 2.5LSB with a
0.2V reference. If this offset is unacceptable, it can be
corrected digitally by the receiving system or by offsetting
the “–” input of the LTC1196.
Noise with Reduced V
The total input referred noise of the LTC1196 can be
reduced to approximately 2mV
good bypassing, good layout techniques and minimizing
noise on the reference inputs. This noise is insignificant
with a 5V reference but will become a larger fraction of an
LSB as the size of the LSB is reduced.
For operation with a 5V reference, the 2mV noise is only
0.1LSB peak-to-peak. In this case, the LTC1196 noise
will contribute virtually no uncertainty to the output
code. However, for reduced references, the noise may
become a significant fraction of an LSB and cause
undesirable jitter in the output code. For example, with
a 1V reference, this same 2mV noise is 0.5LSB peak-to-
peak. This will reduce the range of input voltages over
which a stable output code can be achieved by 1LSB. If
the reference is further reduced to 200mV, the 2mV
noise becomes equal to 2.5LSB and a stable code is
difficult to achieve. In this case averaging readings is
necessary.
This noise data was taken in a very clean setup. Any setup
induced noise (noise or ripple on V
to the internal noise. The lower the reference voltage to be
used, the more critical it becomes to have a clean, noise-
free setup.
A
PPLICATI
OS
of 2mV which is 0.1LSB with a 5V reference
O
U
S
REF
REF
I FOR ATIO
U
P-P
CC
using a ground plane,
, V
W
REF
OS
or V
. For example,
IN
U
) will add
DYNAMIC PERFORMANCE
The LTC1196/LTC1198 have exceptionally high speed
sampling capability. Fast Fourier Transform (FFT) test
techniques are used to characterize the ADC’s frequency
response, distortion and noise at the rated throughput. By
applying a low distortion sine wave and analyzing the
digital output using a FFT algorithm, the ADC’s spectral
content can be examined for frequencies outside the
fundamental. Figure 10 shows a typical LTC1196 FFT plot.
Signal-to-Noise Ratio
The Signal-to-Noise plus Distortion Ratio [S/(N + D)] is
the ratio between the RMS amplitude of the fundamental
input frequency to the RMS amplitude of all other fre-
quency components at the ADC’s output. The output is
band limited to frequencies above DC and below one half
the sampling frequency. Figure 10 shows a typical spec-
tral content with a 882kHz sampling rate.
Effective Number of Bits
The Effective Number of Bits (ENOBs) is a measurement of
the resolution of an ADC and is directly related to S/(N + D)
by the equation:
where N is the effective number of bits of resolution and
S/(N + D) is expressed in dB. At the maximum sampling
N = [S/(N + D) –1.76]/6.02
Figure 10. LTC1196 Non-Averaged, 4096 Point FFT Plot
–100
–10
–20
–30
–40
–50
–60
–70
–80
–90
0
0
100
FREQUENCY (kHz)
200
LTC1196/LTC1198
300
V
f
f
IN
SMPL
CC
= 29kHz
= 5V
400
= 882kHz
1196/98 G25
500
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