LTC1402 Linear Technology, LTC1402 Datasheet - Page 5

• Manufacturer Part Number: LTC1402
• Description: Serial 12-Bit/ 2.2Msps Sampling ADC with Shutdown
• Manufacturer: Linear Technology

Note 12: The absolute voltage at A
Note 13: If less than 7.3ns is allowed, the output data will appear one
clock cycle later. It is best for CONV to rise half a clock before SCK, when
running the clock at rated speed.
Note 14: Not the same as aperture delay. Aperture delay is smaller (2.6ns)
because the 0.8ns delay through the sample-and-hold is subtracted from
the CONV to Hold mode delay.
Note 15: The rising edge of SCK is guaranteed to catch the data coming
out into a storage latch.
Note 16: The Sample mode is started by the 14th rising clock and it is
ended by the rising edge of convert. Because the start of Sample mode is
Unipolar Mode Plots Run with a Single 5V Supply. V
ELECTRICAL CHARACTERISTICS
TYPICAL PERFOR A CE CHARACTERISTICS
12
11
10
12
11
10
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
9
10
10
ENOBs and SINAD
vs Input Frequency (Bipolar)
ENOBs and SINAD
vs Input Frequency (Unipolar)
4
4
f
f
SAMPLE
SAMPLE
= 2.22MHz
= 2.22MHz
INPUT FREQUENCY (Hz)
INPUT FREQUENCY (Hz)
10
10
5
5
10
10
6
6
IN
+
W
and A
1401 G01
1401 G04
IN
U
10
10
–
must be within this range.
7
7
74
68
62
56
50
44
38
32
26
20
14
8
2
74
68
62
56
50
44
38
32
26
20
14
8
2
–100
–110
–120
–100
–110
–120
–10
–20
–30
–40
–50
–60
–70
–80
–90
–40
–50
–60
–70
–80
–90
DD
–10
–20
–30
0
0
10
10
= 5V, V
5 Harmonic THD, 2nd, 3rd and
SFDR vs Input Frequency
(Bipolar)
5 Harmonic THD, 2nd, 3rd and
SFDR vs Input Frequency
(Unipolar)
4
4
f
f
SAMPLE
SAMPLE
THD
SFDR
2ND
3RD
THD
SFDR
2ND
3RD
SS
= 2.22MHz
= 2.22MHz
INPUT FREQUENCY (Hz)
INPUT FREQUENCY (Hz)
= – 5V for Bipolar, V
10
10
5
5
slower than the end of Sample mode, the sample time is 6ns less than the
delay between the 14th SCK and CONV.
Note 17: The internal reference settles in 2ms after it wakes up from Sleep
mode with one or more cycles at SCK and a 10 F capacitive load. The
Sleep mode resets the REFREADY bit in the D
REFREADY bit goes high again 10ms after the V
wake up. This ensures valid REFREADY bit operation even with higher load
capacitances at V
Note 18: The full power bandwidth is the frequency where the output code
swing drops to 2828LSBs with a 4V
10
10
6
6
(Bipolar Mode Plots Run with Dual 5V Supplies.
REF
DD
1401 G02
1401 G05
.
= 5V, V
10
10
7
7
SS
–26
–32
–38
–44
–50
–56
–62
–68
–74
–62
–68
–74
–14
–20
–14
–20
–26
–32
–38
–44
–50
–56
–2
–8
–2
–8
10
10
= 0V for Unipolar), T
SNR vs Input Frequency (Bipolar)
SNR vs Input Frequency (Unipolar)
4
4
f
f
SAMPLE
SAMPLE
P-P
input sine wave.
= 2.22MHz
= 2.22MHz
INPUT FREQUENCY (Hz)
INPUT FREQUENCY (Hz)
10
OUT
10
5
5
REF
sequence. The
has stopped slewing in
LTC1402
A
= 25 C.
10
10
6
6
1401 G03
1401 G06
5
10
10
7
7