LTC1416 Linear Technology, LTC1416 Datasheet - Page 15

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LTC1416

Manufacturer Part Number
LTC1416
Description
Low Power 14-Bit/ 400ksps Sampling ADC
Manufacturer
Linear Technology
Datasheet

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APPLICATIONS
traces connecting the pins and bypass capacitors must be
kept short and should be made as wide as possible.
The LTC1416 has differential inputs to minimize noise
coupling. Common mode noise on the A
will be rejected by the input CMRR. The A
used as a ground sense for the A
will hold and convert the difference voltage between A
and A
be kept as short as possible. In applications where this is
not possible, the A
by side to equalize coupling.
Supply Bypassing
High quality, low series resistance ceramic, bypass
capacitors should be used at the V
(22 F) pins as shown in the Typical Application on the first
page of this data sheet. Surface mount ceramic capacitors
such as Murata GRM235Y5V106Z016 provide excellent
bypassing in a small board space. Alternatively tantalum
capacitors in parallel with 0.1 F ceramic capacitors can be
used. Bypass capacitors must be located as close to the
pins as possible. The traces connecting the pins and the
bypass capacitors must be kept short and should be made
as wide as possible.
Example Layout
Figures 14a, 14b, 14c and 14d show the schematic and
layout of an evaluation board. The layout demonstrates the
proper use of decoupling capacitors and ground plane
with a 2-layer printed circuit board.
IN
. The leads to A
CIRCUITRY
ANALOG
INPUT
IN
U
+
and A
IN
+
INFORMATION
+
U
(Pin 1) and A
IN
traces should be run side
DD
1
IN
2
A
A
+
W
(10 F) and REFCOMP
IN
IN
+
Figure 13. Power Supply Grounding Practice.
input; the LTC1416
REFCOMP
IN
IN
+
IN
4
and A
(Pin 2) should
22 F
input can be
U
AGND
IN
5
leads
V
IN
SS
26
+
10 F
LTC1416
DIGITAL INTERFACE
The A/D converter is designed to interface with micropro-
cessors as a memory mapped device. The CS and RD
control inputs are common to all peripheral memory
interfacing. A separate CONVST is used to initiate a con-
version.
Internal Clock
The A/D converter has an internal clock that eliminates the
need for synchronization between the external clock and
the CS and RD signals found in other ADCs. The internal
clock is factory trimmed to achieve a typical conversion
time of 1.8 s, and a maximum conversion time over the
full operating temperature range of 2.2 s. No external
adjustments are required. The guaranteed maximum
acquisition time is 400ns. In addition, a throughput time
of 2.5 s and a minimum sampling rate of 400ksps is
guaranteed.
Power Shutdown
The LTC1416 provides two power shutdown modes—nap
mode and sleep mode to save power during inactive
periods. The nap mode reduces the power by 95% and
leaves only the digital logic and reference powered up. The
wake-up time from nap to active is 200ns. In sleep mode
the reference is shut down and only a small current of
120 A remains. Wake-up time from sleep mode is much
slower since the reference circuit must power up and
settle to 0.005% for full 14-bit accuracy. Sleep mode
wake-up time is dependent on the value of the capacitor
connected to the REFCOMP (Pin 4). The wake-up time is
20ms with the recommended 22 F capacitor.
AV
DD
28
10 F
DV
DD
27
DGND
14
1416 F13
SYSTEM
DIGITAL
LTC1416
15

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