LTC4222 Linear Technology, LTC4222 Datasheet - Page 10

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LTC4222

Manufacturer Part Number
LTC4222
Description
Dual Hot Swap Controller
Manufacturer
Linear Technology
Datasheet

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LTC4222
SCL: Serial Bus Clock Input. Data at the SDA pin is shifted
in or out on rising edges of SCL. This is a high impedance
pin that is generally driven by an open collector output
from a master controller. An external pull-up resistor or
current source is required.
SDAO: (SSOP Package) Serial Bus Data Output. Open-
drain output for sending data back to the master control-
ler or acknowledging a write operation. Normally tied to
SDAI to form the SDA line. An external pull-up resistor
or current source is required. Internally tied to SDAI in
QFN package.
SDAI: (SSOP Package) Serial Bus Data Input. A high im-
pedance input for shifting in address, command or data
bits. Normally tied to SDAO to form the SDA line. Internally
tied to SDAO in QFN package.
SDA: (QFN Package) Serial Bus Data Input/Output Line.
Formed by internally tying the SDAO and SDAI lines
together. An external pull-up resistor or current source
is required.
SENSE1
nect this pin to the output of the current sense resistor. The
current limit circuit controls the corresponding GATE pin
voltage to limit the sense voltage between the SENSE
SENSE
characteristic, with a maximum of 50mV during start-up
and to 150mV independent of soft-start and foldback after
the start-up timer has expired. A circuit breaker, enabled
after start-up, trips when the sense voltage exceeds 50mV
for 20μs.
SENSE1
Sense Input. Connect this pin to the input of the current
sense resistor. It must be connected to the same trace as
V
10
DDn
. Internally tied to V
+
pins to the level set by the soft-start and foldback
, SENSE2
, SENSE2
+
: Negative Current Sense Input. Con-
: (SSOP Package) Positive Current
DDn
in the QFN package.
+
and
SOURCE1, SOURCE2: N-Channel MOSFET Source and
ADC Input. Connect this pin to the source of the external
N-Channel MOSFET switch for gate drive return. This pin
also serves as the ADC input to monitor output voltage.
The pin provides a return for the gate pull-down circuit.
SS: Soft-Start Input. Sets the inrush current slew rate at
startup. Connect a 68nF capacitor to provide 5mV/ms as
the slew rate for the sense voltage in startup. This cor-
responds to 1A/ms with a 5mΩ sense resistor. Note that
a large Soft-Start capacitor and a small TIMER capacitor
may result in a condition where the timer expires before
the inrush current has started. Allow an additional 2nF
of timer capacitance per 1nF of Soft-Start capacitor to
ensure proper startup.
TIMER: Startup Timer Input. Connect a capacitor between
this pin and ground to set a 12.3ms/μF duration for startup,
after which an overcurrent fault is logged if the inrush is still
current limited. The duration of the off time is 600ms/μF
when overcurrent auto-retry is enabled, resulting in a 1:50
duty cycle. An internal timer provides a 100ms startup
time and 5s auto-retry time if this pin is tied to INTV
Allow an additional 2nF of timer capacitance per 1nF of
Soft-Start (SS) capacitor to ensure proper startup.
UV1, UV2: Undervoltage Comparator Input. Connect this
pin to an external resistive divider from V
age at this pin falls below 1.145V, an undervoltage fault
is detected and the GATE turns off. Pulling this pin below
0.4V resets the fault register for that channel except for
the UV fault bit. Tie to INTV
V
Sense Input. This pin has an undervoltage lockout threshold
of 2.43V. In the QFN package this pin is also the positive
current sense input.
DD1
, V
DD2
: Supply Voltage Input and Positive Current
CC
if unused.
DD
. If the volt-
4222f
CC
.

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