LTC4222 Linear Technology, LTC4222 Datasheet - Page 23

• Manufacturer Part Number: LTC4222
• Description: Dual Hot Swap Controller
• Manufacturer: Linear Technology

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APPLICATIONS INFORMATION
same seven bit address with the R/W bit now set to one.
The LTC4222 acknowledges and send the contents of the
requested register. The transmission is ended when the
master sends a STOP condition. If the master acknowledges
the transmitted data byte, as in a Read Word command,
Figure 10, the LTC4222 repeats the requested register as
the second data byte.
Alert Response Protocol
When any of the fault bits in the FAULT register are set,
an optional bus alert is generated if the appropriate bit in
S
ADDRESS
Figure 11. LTC4222 Serial Bus SDA Alert Response Protocol
a7:a0
Figure 10. LTC4222 Serial Bus SDA Read Word Protocol
W
0
A
0
S
COMMAND
0 0 0 1 1 0 0
RESPONSE
b7:b0
ADDRESS
ALERT
R
1
A
0
A
0
S
ADDRESS
ADDRESS
the ALERT register is also set. If an alert is enabled, the
corresponding fault causes the ALERT pin to pull low. After
the bus master controller broadcasts the Alert Response
Address, the LTC4222 responds with its address on the
SDA line and then release ALERT as shown in Figure 11.
The ALERT line is also released if the device is addressed
by the bus master. The ALERT signal is not pulled low
again until the FAULT register indicates a different fault
has occurred or the original fault is cleared and it occurs
again. Note that this means repeated or continuing faults
do not generate alerts until the associated FAULT register
bit has been cleared.
DEVICE
a7:a0
a7:a0
R A
1 0
A P
1
4222 F11
DATA
b7:b0
A
0
b7:b0
DATA
A P
1
4222 F10
LTC4222
23
4222f