74HCT574D,653 NXP Semiconductors, 74HCT574D,653 Datasheet - Page 3

• Manufacturer Part Number: 74HCT574D,653
• Description: IC FLIP FLOP OCTAL D 3ST 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCTr
• Type: D-Type Busr

Specifications of 74HCT574D,653

• Output Type: Tri-State Non Inverted
• Package / Case: 20-SOIC (7.5mm Width)
• Function: Standard
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 69MHz
• Delay Time - Propagation: 18ns
• Trigger Type: Positive Edge
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 8
• Logic Family: 74HCT
• Logic Type: D-Type Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 15 ns
• High Level Output Current: - 6 mA
• Low Level Output Current: 6 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 4.5 V
• Technology: CMOS
• Number Of Bits: 8
• Number Of Elements: 1
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 5V
• Package Type: SO
• Frequency (max): 20MHz
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1557-2; 74HCT574D-T; 933715630653

NXP Semiconductors
5. Pinning information
74HC_HCT574
Product data sheet
Fig 3.
Fig 5.
Logic symbol
Pin configuration DIP20 and SO20
GND
5.1 Pinning
OE
D0
D1
D2
D3
D4
D5
D6
D7
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
D0
D1
D2
D3
D4
D5
D6
D7
74HCT574
74HC574
OE
CP
001aan290
11
1
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
mna798
20
19
18
17
16
15
14
13
12
11
19
18
17
16
15
14
13
12
V
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
All information provided in this document is subject to legal disclaimers.
CC
Rev. 3 — 15 December 2010
Fig 4.
Fig 6.
Octal D-type flip-flop; positive edge-trigger; 3-state
IEC logic symbol
Pin configuration SSOP20 and TSSOP20
GND
74HC574; 74HCT574
OE
D0
D1
D2
D3
D4
D5
D6
D7
10
1
2
3
4
5
6
7
8
9
11
2
3
4
5
6
7
8
9
1
1D
EN
C1
74HCT574
74HC574
mna446
001aan291
19
18
17
16
15
14
13
12
© NXP B.V. 2010. All rights reserved.
20
19
18
17
16
15
14
13
12
11
V
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
CC
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