74LCX74M Fairchild Semiconductor, 74LCX74M Datasheet - Page 4

• Manufacturer Part Number: 74LCX74M
• Description: IC FLIP FLOP LV DUAL D 14-SOIC
• Manufacturer: Fairchild Semiconductor
• Series: 74LCXr
• Type: D-Typer

Specifications of 74LCX74M

• Function: Set(Preset) and Reset
• Output Type: Differential
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 150MHz
• Delay Time - Propagation: 7ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Number Of Circuits: 2
• Logic Family: 74LC
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Inverting/Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 8 ns
• High Level Output Current: - 24 mA
• Low Level Output Current: 24 mA
• Supply Voltage (max): 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 2 V
• Flip-flop Type: D
• Propagation Delay: 7ns
• Frequency: 150MHz
• Output Current: 24mA
• Ic Output Type: Complementary
• Supply Voltage Range: 2V To 3.6V
• Logic Case Style: SOIC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

©1995 Fairchild Semiconductor Corporation
74LCX74 Rev. 1.7.0
DC Electrical Characteristics
AC Electrical Characteristics
Note:
4. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate
t
Symbol
OSHL
t
t
Symbol
outputs of the same device. The specification applies to any outputs switching in the same direction, either
HIGH-to-LOW (t
PHL
PHL
I
V
V
V
I
V
OFF
CC
I
f
t
OH
I
OL
CC
IH
MAX
IL
I
REC
t
t
t
t
, t
, t
, t
W
W
H
S
PLH
PLH
OSLH
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
Input Leakage Current
Power-Off Leakage Current
Quiescent Supply Current
Increase in I
Maximum Clock Frequency
Propagation Delay,
CP
Propagation Delay,
C
Setup Time
Hold Time
Pulse Width CP
Pulse Width and C
Recovery Time
Output to Output Skew
Dn
n
OSHL
or S
to Q
Parameter
Parameter
) or LOW-to-HIGH (t
Dn
n
CC
or Q
to Q
per Input
n
n
or Q
D
, S
n
D
(4)
OSLH
V
CC
Min.
150
V
1.5
1.5
2.5
1.5
3.3
3.3
2.5
2.3–2.7
2.7–3.6
2.3–2.7
2.7–3.6
2.3–3.6
2.3–3.6
2.3–3.6
2.3–3.6
2.3–3.6
).
CC
C
2.3
2.7
3.0
2.3
2.7
3.0
0
L
3.3V ± 0.3V,
(V)
50pF
4
T
Max.
A
I
I
I
I
I
I
I
I
I
I
0
V
V
3.6V
V
OH
OH
OH
OH
OH
OL
OL
OL
OL
OL
7.0
7.0
1.0
I
I
IH
or V
V
–40°C to +85°C, R
Conditions
V
I
100µA
8mA
12mA
16mA
24mA
V
–100µA
–8mA
–12mA
–18mA
–24mA
CC
O
V
CC
5.5V
I
or GND
Min.
– 0.6V
5.5V
V
150
1.5
1.5
2.5
1.5
3.3
3.6
3.0
C
5.5V
CC
L
50pF
2.7V,
Max.
8.0
8.0
T
V
A
L
CC
Min.
V
1.7
2.0
1.8
2.2
2.4
2.2
CC
– 0.2
–40°C to +85°C
500
Min.
150
1.5
1.5
4.0
2.0
4.0
4.0
4.5
C
L
2.5V ± 0.2V,
30pF
Max.
0.55
±5.0
±10
500
0.7
0.8
0.2
0.6
0.4
0.4
Max.
10
10
8.4
8.4
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Units
Units
µA
µA
µA
µA
MHz
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
ns