cy2vc511 Cypress Semiconductor Corporation., cy2vc511 Datasheet - Page 3

• Manufacturer Part Number: cy2vc511
• Description: Cy2vc511 Low Noise Clock Generator With Vcxo
• Manufacturer: Cypress Semiconductor Corporation.

Frequency Table
VCXO and VIN
The output frequency of the device is adjusted over a limited
range by use of the VCXO feature. This feature is typically used
to phase and frequency lock to a separate reference clock. The
frequency is controlled by the analog voltage on the VIN pin. The
nominal output frequency is generated when VIN = 1.65V. As the
voltage on VIN is increased, the output frequency increases. The
voltage range for VIN is from 0V (V
between output frequency (ppm) to VIN voltage is very linear
over a large portion of the control voltage range.
Absolute Maximum Conditions
Operating Conditions
Document Number: 001-10796 Rev. *D
V
V
T
T
ESD
UL–94
Θ
V
T
T
C
Notes
Parameter
Parameter
1. The voltage on any input or output pin cannot exceed the power pin during power up.
2. Simulated using Apache Sentinel TI software. The board is derived from the JEDEC multilayer standard. It measures 76 x 114 x 1.6 mm and has 4-layers of
A
DD
IN
S
J
DD
PU
JA
LOAD
[1]
[2]
copper (2/1/1/2 oz.). The internal layers are 100% copper planes, while the top and bottom layers have 50% metalization. No vias are included in the model.
HBM
Reference Frequency (MHz)
Supply Voltage
Input Voltage, DC
Temperature, Storage
Temperature, Junction
ESD Protection (Human Body Model)
Flammability Rating
Thermal Resistance, Junction to
Ambient
Supply Voltage Range
Ambient Temperature
Power up time for V
is monotonic)
Load Capacitance on CLK output
27
Description
DD
SS
to reach minimum specified voltage (ensure power ramp
Input
) to V
DD
. The relationship
Description
PRELIMINARY
PLL Multiplier Value
Relative to V
Non operating
JEDEC STD 22-A114-B
At 1/8 in
0 m/s airflow
1 m/s airflow
2.5 m/s airflow
1
SS
Application Information
Power Supply Filtering Techniques
As in any high speed analog circuitry, noise on the power supply
pins can degrade device performance. For general power plane
decoupling, make certain there is at least one tantalum capacitor
(~5 to 10 μF) in the general vicinity of this device. Additionally,
ensure there is one or two multi-layer ceramic chip capacitors
(0.01 or 0.1 μF) located as close as possible to the power and
ground pins of the device. Ensure the layout is optimized to
minimize power and ground inductance and locate the capacitor
as close to the device pins as possible.
Condition
Output Frequency (MHz)
3.135
0.05
Min
0
–
2000
–0.5
–0.5
Min
–65
–
27
V–0
84
79
76
Typ
3.3
–
–
–
V
DD
CY2VC511
Max
150
125
4.4
–
+ 0.5
3.465
Max
500
70
15
Page 3 of 7
°C/W
Unit
Unit
ms
pF
°C
°C
°C
V
V
V
V
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