cy25566 Cypress Semiconductor Corporation., cy25566 Datasheet - Page 7

• Manufacturer Part Number: cy25566
• Description: Spread Spectrum Clock Generator
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-07429 Rev. *B
Absolute Maximum Ratings
Supply Voltage (V
Operating Temperature: ...................................... 0°C to 70°C
Storage Temperature .................................. –65°C to +150°C
Table 4. DC Electrical Characteristics V
Table 5. Electrical Timing Characteristics V
Duty@1.5V
V
V
V
V
V
V
V
V
C
C
C
I
I
I
I
I
t
t
t
t
t
t
t
t
D
D
C
C
REFOUT
Note:
DD1
DD1
DD2
DD2
CLKFR
RISE(a)
FALL(a)
RISE(a+b)
FALL(a+b)
RISE(a+b)
FALL(a+b)
RISE(REF)
FALL(REF)
1.
2.
Parameter
DD
INH
INM
INL
OH1
OH2
OL1
OL2
Parameter
in1
in2
in2
TYin
TYout
CJ1
CJ2
Operation at any Absolute Maximum Rating is not implied.
Single Power Supply: The voltage on any input or I/O pin cannot exceed the power pin during power-up.
Power Supply Range
Input High Voltage
Input Middle Voltage
Input Low Voltage
Output High Voltage
Output High Voltage
Output Low Voltage
Output Low Voltage
Input Capacitance
Input Capacitance
Input Capacitance
Power Supply Current
Power Supply Current
Power Supply Current
Power Supply Current
Input Clock Frequency Range Non-crystal, 3.0V Pk–Pk ext. source
Clock Rise Time
Clock Fall Time
Clock Rise Time
Clock Fall Time
Clock Rise Time
Clock Fall Time
Clock Rise Time
Clock Fall Time
Input Clock Duty Cycle
Output Clock Duty Cycle
Cycle-to-Cycle Jitter
Cycle-to-Cycle Jitter
Refout Frequency Range
DD
: .......................................................+6V
Description
Description
[1, 2]
DD
±10%
S0 and S1 only.
S0 and S1 only.
S0 and S1 only.
I
I
I
I
Xin/CLK (Pin 1)
Xout (Pin 8)
All input pins except 1.
FIN = 40 MHz,15 pF@all outputs
FIN = 40 MHz, No Load
FIN = 165 MHz,15 pF@all outputs
FIN = 165 MHz, No Load
OH
OH
OH
OH
= 3.3V, Temp. = 25°C, unless otherwise noted
DD
= 6 ma, SSCLKa
= 20 ma, SSCLKb
= 6 ma, SSCLKa
= 20 ma, SSCLKb
SSCLK1a/b (Pin 8 and 9)
SSCLK1a or SSCLK1b, Freq = 100 MHz
SSCLK1a or SSCLK1b, Freq = 100 MHz
SSCLK1(a+b), CL = 33 pF, 100 MHz
SSCLK1(a+b), CL = 33 pF, 100 MHz
SSCLK1(a+b), CL = 33 pF, 200 MHz
SSCLK1(a+b), CL = 33 pF, 200 MHz
REFOUT, Pin 3, CL = 15 pF, 50 MHz
REFOUT, Pin 3, CL = 15 pF, 50 MHz
XIN/CLK (Pin)
F = 100 MHz, SSCLK1a/b CL = 33 pF
F = 200 MHz, SSCLK1a/b CL = 33 pF
CL = 15 pF
= 3.3V, T = 25°C and C
Conditions
Conditions
L
= 15 pF, unless otherwise noted. Rise/Fall @ 0.4–2.4V,
0.85V
0.40V
Min.
2.97
0.0
2.4
2.0
3
6
3
DD
DD
Min.
0.50V
1.0
1.0
1.2
1.2
1.1
1.1
1.0
1.0
25
30
45
25
Typ.
V
3.3
0.0
27
21
68
48
DD
4
8
4
DD
Typ.
300
500
1.3
1.3
1.5
1.5
1.4
1.4
1.3
1.3
50
50
0.60V
0.15V
Max.
3.63
V
0.4
1.2
10
32
28
80
60
5
5
DD
DD
DD
CY25566
Max
200
400
600
108
1.6
1.6
1.8
1.8
1.7
1.7
1.6
1.6
70
55
Page 7 of 9
Unit
mA
mA
mA
mA
pF
pF
pF
V
V
V
V
V
V
V
V
Unit
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
%
%
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