cy28443oxc-3t SpectraLinear Inc, cy28443oxc-3t Datasheet - Page 5

• Manufacturer Part Number: cy28443oxc-3t
• Description: Clock Generator Intel Calistoga Chipset
• Manufacturer: SpectraLinear Inc

Rev 1.0, November 20, 2006
Control Registers
Byte 0: Control Register 0
Byte 1: Control Register 1
Byte 2: Control Register 2
Bit
Bit
Bit
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
7
6
5
4
3
2
1
0
@Pup
@Pup
@Pup
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
27M_nss_DOT_96[T/C]
CPU, SRC, PCI, PCIF
spread enable
/100M[T/C]_SST
USB_48MHz
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
SRC[T/C]5
SRC[T/C]4
SRC[T/C]3
SRC[T/C]2
SRC[T/C]0
CPU[T/C]1
CPU[T/C]0
CPU[T/C]2
PCIF0
Name
Name
PCIF1
Name
REF1
PCI5
PCI4
PCI3
PCI2
CPU[T/C]0 Output Enable
RESERVED
RESERVED
SRC[T/C]5 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]4 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]3 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]2 Output Enable
0 = Disable (Tri-state), 1 = Enable
RESERVED, Set = 1
SRC[T/C]0 /100M[T/C]_SST Output Enable
0 = Disable (Hi-Z), 1 = Enable
PCIF0 Output Enable
0 = Disabled, 1 = Enabled
27M nonspread and DOT_96 MHz Output Enable
0 = Disable (Tri-state), 1 = Enabled
USB_48M MHz Output Enable
0 = Disabled, 1 = Enabled
RESERVED
REF1 Output Enable
0 = Disabled, 1 = Enabled
CPU[T/C]1 Output Enable
0 = Disable (Tri-state), 1 = Enabled
0 = Disable (Tri-state), 1 = Enabled
PLL1 (CPU PLL) Spread Spectrum Enable
0 = Spread off, 1 = Spread on
PCI5 Output Enable
0 = Disabled, 1 = Enabled
PCI4 Output Enable
0 = Disabled, 1 = Enabled
PCI3 Output Enable
0 = Disabled, 1 = Enabled
PCI2 Output Enable
0 = Disabled, 1 = Enabled
RESERVED
RESERVED
CPU[T/C]2 Output Enable
0 = Disabled (Hi-Z), 1 = Enabled
PCIF1 Output Enable
0 = Disabled, 1 = Enabled
Description
Description
Description
CY28443-3
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