ds2482-101 Maxim Integrated Products, Inc., ds2482-101 Datasheet - Page 14

• Manufacturer Part Number: ds2482-101
• Description: Single-channel 1-wire Master With Sleep Mode
• Manufacturer: Maxim Integrated Products, Inc.

Single-Channel 1-Wire Master with Sleep Mode
14
Command Code
Command Parameter
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
Command Code
Command Parameter
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
______________________________________________________________________________________
96h
None
Generates eight read-data time slots on the 1-Wire line and stores result in the Read Data
Register.
To read data from the 1-Wire line. Equivalent to executing eight 1-Wire Single Bit commands with
V = 1 (write-one time slot), but faster due to less I
1-Wire activity must have ended before the DS2482-101 can process this command.
Command code is not acknowledged if 1WB = 1 at the time the command code is received and
the command is ignored.
8 x t
acknowledge bit.
Begins maximum 262.5ns after the falling SCL edge of the command code acknowledge bit.
Status Register (for busy polling). Note: To read the data byte received from the 1-Wire line, issue
the Set Read Pointer command and select the Read Data Register. Then access the DS2482-101
in read mode.
1WB (set to 1 for 8 x t
1WS, APU apply.
A5h
Data Byte
Writes a single data byte to the 1-Wire line.
To write commands or data to the 1-Wire line. Equivalent to executing eight 1-Wire Single Bit
commands, but faster due to less I
1-Wire activity must have ended before the DS2482-101 can process this command.
Command code and data byte are not acknowledged if 1WB = 1 at the time the command code is
received and the command is ignored.
8 x t
Begins maximum 262.5ns after falling SCL edge of the LSB of the data byte (i.e., before the data
byte acknowledge). Note: The bit order on the I
first; I
the full data byte.
Status Register (for busy polling).
1WB (set to 1 for 8 x t
1WS, SPU, APU apply.
SLOT
SLOT
2
C: MSB first). Therefore, 1-Wire activity cannot begin before the DS2482-101 has received
+ maximum 262.5ns, counted from the falling SCL edge of the command code
+ maximum 262.5ns, counted from falling edge of the last bit (LS bit) of the data byte.
SLOT
SLOT
).
).
2
C traffic.
2
C bus and the 1-Wire line is different (1-Wire: LSB
2
C traffic.
1-Wire Write Byte
1-Wire Read Byte