ds2482-101 Maxim Integrated Products, Inc., ds2482-101 Datasheet - Page 6

• Manufacturer Part Number: ds2482-101
• Description: Single-channel 1-wire Master With Sleep Mode
• Manufacturer: Maxim Integrated Products, Inc.

Single-Channel 1-Wire Master with Sleep Mode
The DS2482-101 is a self-timed 1-Wire master that sup-
ports advanced 1-Wire waveform features including
standard and overdrive speeds, active pullup, strong
pullup for power delivery, and presence-pulse masking.
The active pullup affects rising edges on the 1-Wire
side. The strong pullup function uses the same pullup
transistor as the active pullup, but with a different con-
trol algorithm. In addition, the strong pullup activates
the PCTLZ pin, controlling optional external circuitry to
deliver additional power beyond the capabilities of the
on-chip pullup transistor. Once supplied with command
and data, the input/output controller of the DS2482-101
performs time-critical 1-Wire communication functions
such as reset/presence-detect cycle, read-byte, write-
byte, single-bit R/W, and triplet for ROM Search, without
requiring interaction with the host processor. The host
obtains feedback (completion of a 1-Wire function,
presence pulse, 1-Wire short, search direction taken)
through the Status Register and data through the Read
Data Register. The DS2482-101 communicates with a
host processor through its I
mode or in fast mode. The logic state of two address pins
determines the I
allowing two devices operating on the same bus segment
without requiring a hub. See Figure 1 for a block diagram.
The DS2482-101 has three registers that the I
can read: Configuration, Status, and Read Data. These
registers are addressed by a read pointer. The position
of the read pointer, i.e., the register that the host reads
in a subsequent read access, is defined by the instruc-
tion the DS2482-101 executed last. To enable certain
1-Wire features, the host has read and write access to
the Configuration Register.
The DS2482-101 supports four 1-Wire features that are
enabled or selected through the Configuration Register.
These features are:
• Active Pullup (APU)
6
_______________________________________________________________________________________
BIT 7
1WS
2
C slave address of the DS2482-101,
BIT 6
SPU
Detailed Description
Configuration Register
2
Device Registers
C bus interface in standard
BIT 5
PPM
2
BIT 4
C host
APU
• Presence-Pulse Masking (PPM)
• Strong Pullup (SPU)
• 1-Wire Speed (1WS)
These features can be selected in any combination.
While APU, PPM, and 1WS maintain their state, SPU
returns to its inactive state as soon as the strong pullup
has ended.
After a device reset (power-up cycle or initiated by the
Device Reset command), the Configuration Register
reads 00h. When writing to the Configuration Register,
the new data is accepted only if the upper nibble (bits 7
to 4) is the one’s complement of the lower nibble (bits 3
to 0). When read, the upper nibble is always 0h.
The APU bit controls whether an active pullup (con-
trolled slew-rate transistor) or a passive pullup (R
resistor) is used to drive a 1-Wire line from low to high.
When APU = 0, active pullup is disabled (resistor
mode). Active pullup should be selected if the 1-Wire
line has a substantial length (several 10m) or if there is
a large number (approximately 20 or more) of devices
connected to a 1-Wire line. The active pullup does not
apply to the rising edge of a presence pulse or a
recovery after a short on the 1-Wire line.
The circuit that controls rising edges (Figure 2) oper-
ates as follows: At t
or 1-Wire slave) ends. From this point on the 1-Wire bus
is pulled high through R
101. V
determine the slope. In case that active pullup is dis-
abled (APU = 0), the resistive pullup continues, as rep-
resented by the solid line. With active pullup enabled
(APU = 1), and when at t
level between V
actively pulls the 1-Wire line high, applying a controlled
slew rate as represented by the dashed line. The active
pullup continues until t
time on the resistive pullup continues. See the Strong
Pullup (SPU) section for a way to keep the pullup tran-
sistor conducting beyond t
BIT 3
1WS
Configuration Register Bit Assignment
CC
and the capacitive load of the 1-Wire line
IL1(MAX)
BIT 2
SPU
1
, the pulldown (from DS2482-101
APUOT
and V
WPU
2
3
.
the voltage has reached a
is expired at t
IH1(MIN)
internal to the DS2482-
BIT 1
PPM
Active Pullup (APU)
, the DS2482-101
3
. From that
BIT 0
APU
WPU