ds2152 Maxim Integrated Products, Inc., ds2152 Datasheet - Page 34

• Manufacturer Part Number: ds2152
• Description: Ds2152 Enhanced T1 Single Chip Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

RIR3: RECEIVE INFORMATION REGISTER 3 (Address = 10 Hex)
Table 5-1. Receive T1 Level Indication
(MSB)
RL1
SYMBOL
RL1
0
0
1
1
LORC
FRCL
JALT
RL1
RL0
—
RL0
0
1
0
1
RL0
RIR3.2, RIR3.1,
POSITION
RIR3.7
RIR3.6
RIR3.5
RIR3.4
RIR3.3
RIR3.0
TYPICAL LEVEL
JALT
less than -22.5
RECEIVED
-15 to -22.5
-7.5 to -15
+2 to -7.5
(dB)
NAME AND DESCRIPTION
Receive Level Bit 1. See
Receive Level Bit 0. See
Jitter Attenuator Limit Trip. Set when the jitter attenuator
FIFO reaches to within 4 bits of its limit; useful for debugging
jitter attenuation operation.
Loss of Receive Clock. Set when the RCLKI pin has not
transitioned for at least 2µs (3µs ±1µs).
Framer Receive Carrier Loss. Set when 192 consecutive 0s
have been received at the RPOSI and RNEGI pins; allowed to be
cleared when 14 or more 1s out of 112 possible bit positions are
received.
Not Assigned. Could be any value when read.
LORC
34 of 97
FRCL
Table
Table
—
5-1.
5-1.
—
(LSB)
—