ds1384 Maxim Integrated Products, Inc., ds1384 Datasheet - Page 3

• Manufacturer Part Number: ds1384
• Description: Ds1384 Watchdog Real Time Clocks Controller
• Manufacturer: Maxim Integrated Products, Inc.

13, 14, 15,
16, 41, 44
17–21
32, 34
PIN
22
23
24
26
31
35
36
37
DQ0, DQ1, DQ2,
V
DQ3–DQ7
BAT1,
NAME
GND
SQW
V
CEO
OER
PFO
WE
OE
CE
CCO
V
BAT2
Data Bus (Bidirectional). When a qualified address from 00000H–
0003FH is presented to the device, data is passed to or from the on-
chip 64 timekeeping/RAM registers via the data bus lines. Data is
written on the rising edge of WE when CE is active. If CE is active
without WE, data is read from the device and driven onto the data bus
pins when OE is low.
Ground. DC power input.
Active-Low RAM Chip-Enable Output. When power is good, the CE
input is passed through to CEO. If V
an inactive high level.
Active-Low RAM Output Enable (Output). When power is good and
the address value is not within the range of 00000H and 0003FH, and
CE is active, the OE input is passed through to OER. If these
conditions are not met, OER remains at an inactive high level.
Active-Low Chip Enable (Input). This signal must be asserted low
during a bus cycle to access the on-chip timekeeping RAM registers,
or to access the external RAM via CEO.
Active-Low Output Enable (Input). This signal identifies the time
period when either the RTC or the external SRAM drives the bus with
read data, provided that CE is valid with WE disabled. When one of
the 64 on-chip registers is selected during a read cycle, the OE is the
enable signal for the DS1384 output buffers and the data bus is driven
with read data. When the external RAM is selected during a read
cycle, the OE signal is passed through to the OER pin so that read data
is driven by the external SRAM.
Active-Low Write Enable (Input). This signal identifies the time
period during which data is written to either the on-chip registers or to
an external SRAM location. When one of the on-chip 64 registers is
addressed, data is written to the selected register on the rising edge of
WE.
Battery Inputs for Any Standard 3V Lithium Cell or Other Energy
Source. Battery voltage must be held between 2.4V and 4V for proper
operation. In the absence of power, the DS1384 has a maximum load
of 0.5µA at +25°C. This should be added to the amount of current
drawn from the external RAM in standby mode at +25°C to size the
external energy source. The DS1384 samples V
always selects the battery with the higher voltage. If only one battery
is used, the unused battery input must be grounded.
Power-Fail Signal (Output, Active Low when V
occurs t
Square-Wave Output. This pin can be programmed to output a
1024Hz square-wave signal. When the signal is turned off, the pin is
high impedance.
Switched DC Power for SRAM (Output). This pin is connected to V
when V
V
voltage battery pin.
CC
voltage falls below this level, V
REC
CC
voltage is above V
after power-up and V
3 of 18
FUNCTION
SO
(the greater of V
CC
≥ 4.5V.
CC
CCO
is below V
is connected to the higher
BAT1
WP
BAT1
PF
Occurs). High state
and V
, CEO remains at
or V
BAT2
BAT2
). When
and
CC